Technical discussions about the TI C55x DSPs (including the c5501, c5502, c5503, c5507, c5509, c5510 and OMAP5910).
Search Results for "emif"
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malik_arjun_rcr - Mar 25 2002
Hi all,
I am Unable Configure the EMIF using CSL Library.or Using Bios Cnfig
file usin GUI configeration..
IF anyone knows about this pls Send me details ..... 
schu...@enertex.de - Nov 18 2005
Hi,
we've prooved (unfortunately we didn't see the spra925 Appendix before) that the emif of a 5501 device will make an async read acess to the emif only 1 per 18 cpu cycles.... 
zhon...@senao.com - Jun 22 2007
I have a question about EMIF/HPI mode in C5507. It is true that we can not use HPI and EMIF at the same time, but the question is
Can we use HPI mode to boot up DSP when power ... 
liwe...@gmail.com - Jul 19 2007
Dear list,
I have difficulties to boot up from SPI flash: IO4 goes down, DSP read data, but IO4 doesn't rise again. So DSP doesn't start to execute. TI support told me EMIF.ARDY... 
jalal_habibi - Jan 26 2005
Hi all,
I have a problem with write to TMS320C5509 emif.
I write to a typical addresse in ce spaces: (IO_PORT = 0x400000) like
this:
*(volatile unsigned ... 
Jeff Brower - Jan 17 2005
All-
We are doing a C5502 design, with emphasis on low cost. One issue that we still have
not resolved is EMIF clock rate -- we would normally use 7 or 8 nsec ex... 
aimo...@gmail.com - Sep 25 2006
Hello,
I'm trying to change parallel bus to EMIF mode, but I don't know how to do it from source code. It goes to HPI mode when because of BOOT3 (IO.0) is 0 during power up (boo... 
smiffoz - Jun 30 2006
Hi All,
I have a USB device hooked off my 5510s EMIF, and can use it quite
happily using asynchronous mode on both DSP and USB device.
However, when the USB device runs in ... 
Moranjkic Adnan - Aug 22 2007
Hi All,
I am working on TMS320C55 (OMAP5910). I need to change some registers for EMIF. I do know 16-bit addresses for my registers but I cannot write them using CCS. I need to ... 
rotenovt - Feb 8 2006
Hello Group,
I am having trouble understanding how to use the EMIF as a parallel
port. I am attempting to interface an AD9857(ASIC) with a TMS320C5510
(DSK). I have the EMIF si... 
Jeff Brower - Jan 25 2005
Or a larger SDRAM? The largest one readily available that fits standard JEDEC site
is 8M x 32, or 256 Mbit.
-Jeff
-------- Original Message --------
Su... ![[Fwd: 5502 EMIF / SDRAM Interface]](/new/images/icon_more.jpg)
patk...@mte-india.com - May 13 2008
Hi Dileepan,
I am working with TMS320C5509A emif and facing a similar problem.
When I write address for CE spaces no Chip select is generated. By default CE signal for CE spa... 
Ravikanth M - May 15 2002
Hi,
I am working on OMAP1510 board. I need to interface
external SDRAM with DSP(C55x), without using ARM. I
tried using EMIF configuration manager in DSP BIOS cdb... 
smiffoz - Jun 19 2006
Hi all,
I have a 5510 connected to an external device over the EMIF as
asynchronous memory, and I want to DMA from internal RAM to this
device.
I also want to run my CPU ... 
Ryan Piwowarski - Jan 25 2005
TI documentation for the 5501/5502 EMIF (SPRU621D) suggests that it is
compatable with 64Mbit SDRAM. That would be 2Mx32-bit or 8MB of data.
The maximum CE spa... 
Jeff Brower - Jun 30 2006
Scottie-
> I have a USB device hooked off my 5510s EMIF, and can use it quite
> happily using asynchronous mode on both DSP and USB device.
Small problem at this point... ... 
ludovic44fr - Feb 15 2005
Hi everyone,
We are currently upgrading our product, going from 5410A to 5509A.
I do need to use the EMIF to load my code from flash, and i also need
... 
fbmy...@ncsu.edu - Jul 23 2005
All,
I'm working with Alex on this project. We've initilized the SDRAM registers according to the datasheet and to reference designs, and still nothing. What seems to happe... 
torgeirjakobsen - Feb 18 2002
Hi
I had problems with the idle domain a while ago, and I did not find
out why they did not work. I am trying again now, and it works better
than the first tim... 
Jeff Brower - Nov 18 2005
Sateesh-
> i'm working on c55x dsp series architecture modifications .
> My plan is to implement on 65 nm technology.
> every architecture is designed for 1 perticular ... ![Re: hi [C55x algorithms in 65 nm process]](/new/images/icon_more.jpg)
rstevesat - Apr 27 2005
Hi all,
I need to access the led's on the dsk 5510 . Do i just need
to write in the cpld reg. or i have to program the emif . Please reply
asap.
Thanks
Steve. ... 
gabr...@iis.fraunhofer.de - Feb 1 2007
Hello,
i have spent several hours trying to get my Flash Memory (AT49LV1024, 1Mbit) running
on EMIF.
My Configuration is:
EMIF_FSET(EGCR,MEMFREQ,4); //MEMFREQ 1/16 CPU
EMI... 
Jeff Brower - Feb 18 2005
DMARSH-
> We are starting a new project centering around USB interface.
> Basically, the project consists of a USB sound card using isochronous
> transfers and... 
theitabhiyanta - Jun 28 2006
Hi
I have a custom 5502 board. I have been able to write code to it's
SDRAM and execute form there. My problems (unexpectedly) are coming
from flash.
i can access it's flash ... 
sachinpandhare - Apr 16 2002
hi all,
i have one problem regarding DMA.
my aim is to transfer the unpacked data from internal memory to
external memory in packed format with double indexing (D... 
Dileepan C - Apr 21 2006
hi Scottie,
There is an on-chip dma controller for c5510.
This is user programmable to transfer data between an
external device(that is interfaced to dsp through
EMIF) and t... 
harlandchristofferson - Jan 25 2006
has anyone used this?
according to TMS320VC5501/5502 DSP Instruction Cache Reference Guide
(Rev. C) (spru630c.pdf), the configuration, flushing, and enabling is
pretty... 
jeanpierrepoulin - Mar 1 2004
Hi,
Studying proper circuit design featuring TI DSPs and CPLDs/FPGAs,
I'm wondering about the `cost-of-entry' to properly use these
devices alongside a DSP... ... 
the_...@hotmail.com - Aug 28 2006
Thanks for your reply. I'll give your suggestions a try!
I noticed that the for loop is not quite right.. im assuming the msg got truncated somehow? I'm sure i've seen a bit mor... 
Jeff Brower - Jan 14 2008
Patki-
> I am working on tms320c5509a. In BGA package it is having 21 address lines
> with 4 CE for external/internal memory.
>
> Thus if I interface the external memory... 
Martin Bernier - Nov 27 2001
Hi everyone,
Here's an update...
Version 2.0 has a confirmed bug with memory corruption via
EMIF/EHPI. There is a problem at odd addresses. This bug doesn't... 
dpn...@dsp-bg.info - Jun 21 2006
Hello All,
I have a very hard time trying to make the EMIF in TMS320VC5509APGE-4A
working stable at 192MHz.
The test conditions:
Hardware: DSP: TMS320VC5509APGE-4A
Vdd... 
Jeff Brower - Aug 16 2007
Adnan-
> Your suggestion is great. Thank you.
>
> Could you give me more directions? Or could you explain it to more?
>
> I am working on OMAP5910 (TMS320C55xx) and I can... 
Jeff Brower - Aug 31 2006
John-
> Thanks for your reply. I'll give your suggestions a try!
>
> I noticed that the for loop is not quite right.. im assuming the msg
> got truncated somehow? I'm su... 
amst...@ncsu.edu - Jul 18 2005
We designed a board based of the 5502, we have a SDRAM on CE0, and a ADC on
CE1. When we try and write a value to the address space of the ADC, the CE1 line
WONT drop. Aft... 
sirioseyes - Apr 17 2003
Hello,
I start this month to use SDRAM (64MBit) on spaces CE0 CE1, but I have some
problems.
I write a program that use DMA transfers from internal DARAM to... 
tanger_cat - Sep 25 2003
i am a new number of 5509 ,i cannot understand the parrel EMIF boot
loader of 5509, a0-a13 and d0-d15 connect with flash, EMIF_ce0--
EMIF_ce3(throgh CPLD as 2 addre... 
dileepan_c - Feb 8 2005
hi,
Except GPIO0-GPIO7, other GPIO lines are multiplexed with other
signal functionalities in C5509A. Refer table 3-6 in the datasheet
for details.I dont ... 
sram...@yahoo.com - Aug 19 2006
Hi,
I am trying to configure EMIF to write/read to/from
external memory. Below I am including linker cmd file
and source code. I am unable to notice any changes
using oscillo... 