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Technical discussions about the TI C55x DSPs (including the c5501, c5502, c5503, c5507, c5509, c5510 and OMAP5910).
Search Results for "sdram"
interfacing SDRAM with c5502 [3 Articles]
vishnu_0806 - Dec 19 2006
hai friends,
my name is vishnu. i have been working with C5502 for some
time for my current project. coding is done in CCS2. in our DSP board
an SDRAM is also connec... 
SDRAm interface with 5510
gagan singh - May 6 2003
Hi,
DO any one faced some problem in updating the
SDRAM interfaced to your target, In the CCS whenever
it comes up. The SDRAM memory area is shown as oxffff.
On... problem with SDRAM in c5510 [2 Articles]
aliaa - Jul 4 2008
i have 25 constant float arrays each of [128][12] when i used sections
in SDRAM 10 of this arrays has address starting from 0x0200000 which i
couldn't access when i checked SDR... [Fwd: 5502 EMIF / SDRAM Interface]
Jeff Brower - Jan 25 2005
Or a larger SDRAM? The largest one readily available that fits standard JEDEC site
is 8M x 32, or 256 Mbit.
-Jeff
-------- Original Message --------
Su... testing of sdram [2 Articles]
khem...@spectross.com - Dec 31 2008
hello all
we are doing sdram interfacing to tms320c5502 dsp processor.but some problem regarding to testing are occure.i need the testing algo for testing the sdram .plea... 5502 EMIF / SDRAM Interface [4 Articles]
Ryan Piwowarski - Jan 25 2005
TI documentation for the 5501/5502 EMIF (SPRU621D) suggests that it is
compatable with 64Mbit SDRAM. That would be 2Mx32-bit or 8MB of data.
The maximum CE spa... Urgent: C5509 SDRAM access problem
sirioseyes - Apr 17 2003
Hello,
I start this month to use SDRAM (64MBit) on spaces CE0 CE1, but I have some
problems.
I write a program that use DMA transfers from internal DARAM to... SDRAM - General question [9 Articles]
tonyzlr - Mar 17 2009
Hello all,
I'm looking to interface SDRAM to the 5502. I've been
designing embedded systems for 25 years, but unfortunately
(or perhaps, fortunately :)) have never used any ty... Re: EMIF performance [6 Articles]
Jeff Brower - Nov 18 2005
Michael-
> > Did TI mention 5502? What about with cache enabled -- still that slow?
> > Can you tell me which TI person you were talking to?
> well cache enabling does ... 5502 and SDRAM on 150MHz clock - is it possible or I'm just lucky?
alte...@gmail.com - Aug 22 2007
Hi all!
I use 5502 chip with 300 MHz clock frequency and configured PLLDIV3 so that SYSCLK3=150 MHz. It is far above allowed 100 MHz (SPRS166J, page 58, 3.10.4.4 External Memory... 5502 EMIF SDRAM [2 Articles]
fbmy...@ncsu.edu - Jul 23 2005
All,
I'm working with Alex on this project. We've initilized the SDRAM registers according to the datasheet and to reference designs, and still nothing. What seems to happe... Sample code for interfacing SDRAM in c5509?
kakoutan - May 13 2004
As above,anybody have some sample material to send to me? Am working
on a skywalker board now for utilising the sdram for temporary
storage purpose,thank
... c5502 with 200MHz SDRAM or C5510 without external RAM?
ahma...@yahoo.com - Jun 19 2008
hi
if my project size were 320KB which of this items is more proper and efficient regarding to speed,power,price:
tms320vc5502 (300MHz) with 300MHz (or 200MHz) SDRAM
... Error in accessing SDRAM (or IRAM) on DSP side of OMAP 1510
rmb - Nov 3 2005
Hi All,
I would like to access the SDRAM (or IRAM) on the DSP side of OMAP
1510.
There is code on TI website for OMAP 5910 for configuring the DSP MMU
to map the 32 bi... Interfacing external SDRAM
Ravikanth M - May 15 2002
Hi,
I am working on OMAP1510 board. I need to interface
external SDRAM with DSP(C55x), without using ARM. I
tried using EMIF configuration manager in DSP BIOS cdb... 5510 and SDRAM [2 Articles]
Danny Marsh - Jan 7 2003
Hello group,
I am using TMS320VC5510 version 2.1 running 200MHz. I was wondering if anyone
has gotten an SDRAM running at 100MHz to work with the 5510. If so I w... Re: 5502 and SDRAM on 150MHz clock - is it possible or I'm just lucky?
Jeff Brower - Aug 22 2007
Altegoist-
> I use 5502 chip with 300 MHz clock frequency and configured PLLDIV3 so that
> SYSCLK3=150 MHz. It is far above allowed 100 MHz (SPRS166J, page 58,
> 3.10.4.4 E... Re: hi [C55x algorithms in 65 nm process] [2 Articles]
Jeff Brower - Nov 18 2005
Sateesh-
> i'm working on c55x dsp series architecture modifications .
> My plan is to implement on 65 nm technology.
> every architecture is designed for 1 perticular ... spanning page boundary not allowed [4 Articles]
dcar...@solacom.com - Feb 6 2007
How do I get rid of the following warning:
> > warning: .hwi_disp_sec section (0x1fff8) spans page boundary: not allowed
before CPU revision 3.0
The code is com... malloc in different sections without DSP/BIOS [5 Articles]
Lakshman - Sep 13 2004
Hello All,
Can I malloc 40k memory of 5 buffers in C55x and how
will I allocate these buffers from different memory
sections Lets say one malloc operation in D... C5510 Application doesn't work after FlashBurn with .cinit allocated in SDRAM [2 Articles]
x.sh...@surrey.ac.uk - Feb 7 2008
Hi all,
I am using a Spectrum Digital TMS320VC5510 DSK board to develop an application. The application, after FlashBurn to the onboard FlashROM, runs OK if I allocate the Data ... Re: C5510 Application doesn't work after FlashBurn with .cinit allocated in SDRAM
Jeff Brower - Feb 7 2008
Xiyu Shi-
> I am using a Spectrum Digital TMS320VC5510 DSK board to develop an
> application. The application, after FlashBurn to the onboard FlashROM,
> runs OK if I alloc... Hardware Extensions on C5509
Maneesh Gupta - Aug 5 2002
Hi,
My name is Maneesh Gupta and I am currently working on development
of an
application on TMS320CC55x.
This application makes use of C5509/C5510 Hardware E... EMIF bypassing DBP/BIOS, How?
Mehdi Abolfathi - Oct 8 2008
Dear All,
Using 5510 dsk, Spectrum Digital,
In a hurry to drive EMIF bypassing DSP/BIOS but I can't see the CE pin changing in the write operation:
Here is main source ... 5502 problems w/PCB redesign: max CPU 132MHz, EMIF 33MHz, peripherals 66MHz
josmand - Oct 7 2008
Hi,
We've been developing code on a custom PCB for the 5502 chip. We
realized we needed a port expander, so we made a revision to our
custom board. However, now we are not ab... DSK5510 - same program works from emulator, but not from flash
Arvid Tomayko-Peters - May 22 2008
Hi,
I am having a problem running a program from flash memory on the=20=20
DSK5510 and I was hoping someone could give me a pointer (no pun=20=20
intended - really) as to what... Re: DSK5510 - same program works from emulator, but not from flash [2 Articles]
Jeff Brower - May 23 2008
Arvid Tomayko-Peters-
> I am having a problem running a program from flash memory on the
> DSK5510 and I was hoping someone could give me a pointer (no pun
> intended - rea... Re: 32bit addressing in EMIF
Jeff Brower - Feb 19 2009
Ashish-
> I want to do 32bit addressing in EMIF CE2. I have defined MYTPE for 32bit . EMIF
> space 2 starts with word address 0x40 0000. Now I am not sure of which address
> ... Re: 5502 problems w/PCB redesign: max CPU 132MHz, EMIF 33MHz, peripherals 66MHz
Jeff Brower - Oct 10 2008
John-
> We've been developing code on a custom PCB for the 5502 chip. We
> realized we needed a port expander, so we made a revision to our
> custom board. However, now we ... Any simple reference designs available to get started with TI DSPs?
jeanpierrepoulin - Mar 23 2004
Hi,
I'm entering the brave new world of TI DSPs from a world of (far
simpler) PICs, and I'm having some difficulty building my first test
circuit...
I'... Heap Allocation On 5510DSK
Abhishek Dixit - Nov 4 2005
Dear All,
For implementing video decoder I have changed target board to
TMS320VC5510DSK from TMS320C6416DSK. But I am having problem in
allocating heap size. The dynami... how to use GPIO 8, [2 Articles]
- Feb 6 2005
I have an SDRAM (MT48LC8M16A2TG) connected to 5509A and willing to use pin 16, 22 and 25 which are GPIO 8, 10, 11 respectively, as general purpose output pins.
... Re: tms320c5509--address line in memory map
Jeff Brower - Jan 14 2008
Patki-
> I am working on tms320c5509a. In BGA package it is having 21 address lines
> with 4 CE for external/internal memory.
>
> Thus if I interface the external memory... C5502 EMIF question/help! [7 Articles]
amst...@ncsu.edu - Jul 18 2005
We designed a board based of the 5502, we have a SDRAM on CE0, and a ADC on
CE1. When we try and write a value to the address space of the ADC, the CE1 line
WONT drop. Aft... TMS320VC5509A
Mohamed Youssef Wassal - Jun 21 2007
hi all
we have bought from you TMS320VC5509A Power Optimization DSK starter kit and when we worked on it we found that the configuration of the DSP/BIOS is not matched with th... ARn vs. XARn addressing
Christian Narvaez - May 8 2007
Hello:
I am starting to work with assembly for the c5000 (5009).
I am working on 2 buffers in the following way:
.....
RPT CSR
MACM *AR0+, *AR1+, AC0
.....
The addresses a... Problem Initializing DPLL1 on OMAP1510
Lakshman - Nov 22 2004
Hello all,
I’m having a problem in setting up registers in
ARM-DSP Initialization for OMAP1510 Innovator.
I configured the ARM registers like DPLL1, ARM_CLK... using icache on c5502
adit...@gmail.com - Sep 25 2006
Hello all
I am trying to run two channels of G.729 vocoder on the c5502 processor. The processor is running at 300 MHz and the external SDRAM ( synchronous interface with the EM... clkmd problem. PLL, or core voltage may be [6 Articles]
erta...@hotmail.com - Nov 12 2009
We have a custom design c5509a board. When we set the clkmd to 2512, everything is ok but when we set the value to 0x2892 ( and we have to run the code at this speed) the code some... Re: Memory problem [3 Articles]
Jeff Brower - Jul 26 2007
Moranjkic-
> I have one problem about memory. When I am trying to write in EXTMEM I do not
> have problem but I have problem when I am reading same data from external memor...