Technical discussions about the TI C6000 DSPs (including the c62x, c64x and c67x DSPs).
Search Results for "c6415"
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Jay Huang - Aug 23 2002
Dear DSPers,
I need to design a communication scheme for C6415 to
be able to communicate with a host processor. I am
wondering someone could explain to me how ... 
zhang_zhh - Feb 20 2002
Hi All,
We just had prototype communication board using C6415. When I
implemented the driver on WinNT 4.0 for this board and test it from
host, I found: 1. the... 
Jane Shen - Mar 24 2005
Hi all,
Anyone has the experience of connecting one 32bit SDRAM to EMIFA of
C6415? My questions are:
1) Is this OK, given the fact that 32bit data lines of... 
Jane Shen - Apr 1 2005
Hi,
Is it possible to connect multiple DSPs (C6415) configuration pins
together and share one set of configuration resistors? The scenario is
like this: 8 C6415 fo... 
gururajb2 - Apr 24 2003
hi all,
I am facing problem in bringing up CCS through JTAG for C6415 .Since
all conections to JTAG header is less than 6 inchs i am not using any
signal bufferin... 
Jeff Brower - Nov 29 2004
I heard today from one of our engineers that C6415 has only 1x, 6x, and 12x
mulipliers available for its onchip PLL.
For the 500 MHz version of the device,... 
Steve Sharp - Aug 9 2002
Hi,
I currently have a c5402 booting via serial (code & data loaded from the
serial port), however i have now moved to the c6415 and am looking to boot
the pro... 
behcsiang - Dec 10 2003
Hi,
If I'm not mistaken, when the C6415 connected to
a host system as a PCI target device, the host or any
other master device on the PCI bus can access to C64... 
Steve Sharp - Sep 9 2002
Hi DSP'ers,
I am currently trying to build a dsp driver for linux to work with our
c6415. I have managed to load some code into the dsp's memory over the PCI
i... 
jfbuggen - Mar 6 2002
Hello,
Does anyone has an idea on how I could transfer large
blocks of data (>64KB) through the PCI interface of a C6415 DSP
using the DSP MASTER mode ?
I... 
drenger_gabi - Jun 23 2002
I want to connect a fifo with width of 16 bit to C6415 EMIFA .
To read the fifo using PDT ( peripherral device transfer )
The EMIFA has a 64 bit width SDRAM as the... 
William Zhang - May 17 2005
Hi,
I am developing a new board utilizing TI's C6415 chip
and H.110 Framer. I have some troubles with the McBSP
port when the the serial port is running at 8M.
... 
Harish Nair R - Oct 11 2004
Can anyone tell me a good starter kit for c6415? and if it is
available in India? The TI website mentions only 6416 DSKs
... 
Jeff Brower - Oct 2 2005
We're working with multiple C6415 board, and we've noticed that when C641x devices
are held in Reset, they actually generate more heat than when running. The chips
work t... 
Jeff Brower - Nov 18 2005
Alok-
> This is for academic purpose. Could you provide some names/links to
> those PCI cards?
I suggest to enter this in Google:
C6415 PCI board
Generally... 
o_suplis - Aug 11 2005
I am writing a C++ application on C6415 using CCS 3.
I use a C library for which I have to provide an interrupt handler
(thus, that function will be called using the C call... 
"Jeffrey Y. Beyon" - Sep 8 2008
I get the correct FFT output "shape" of a say sine wave using
DSP_fft16x16t with C6415, but the it is in Q15. How can I accurately
scale it back to a float value? Do I just hav... 
dakys sola - Jul 4 2007
Hi all,
I'm new in DSP. Could you please help me in finding the max SDRAM bandwidth in a C6415 DSP?
Something else, I want to connect my DSP to a FPGA through EMIFA and use EMI... 
Beh CS :-|| - Oct 29 2002
Hi,
I'm using TI's C6415 processor, C6400 xds560 board and CCS 2.
When I try the RTDX tutorials, I can't enable the RTDX function in CCS.
I got the message ... 
jfbuggen - Mar 15 2002
Hello,
I'm writing a C6415 app with CCS2.1. I have some problems with
the linker.
The __STACK_SIZE symbol is defined by the linker and used
to initialise ... 
Deniz Parlak - Aug 29 2003
Hi,
We're moving to C6416 from C5416 for one of our products.
I've seen at the C6000 CCS page that this release of CCS supports simulator
only for C6414,C6415,C641... 
behcsiang - Jan 9 2003
Dear All,
I'm using CCS 2.1. / C6415.
I'm working on a video encoder. Most of my codes
are written in C language. Some in Linear Assembly.
Previously, my ... 
Yahia Tachwali - Dec 5 2008
Laurent Desnogues wrote:
> > Does any body know how data structures are organized in
> > memory by the compiler of code composer. I failed to find
> > any reference that ca... 
Dillon, Tom - Feb 21 2002
Simha,
The reason the PSL and CSL have similar functionality is that PSL is being
phased out and CSL is its replacement. All current and future software
develo... 
Jeff Brower - Jun 7 2007
Geckook Xu-
> Thank you for your reply.
> 1) I don't know what did you refer to 'PMC'. But I am sure my card
> implements PCI bus interface.
Ok. I mentioned PMC because... 
Jeff Brower - Oct 11 2002
Andrew-
> I think the biggest difference in the L2 cache. In my opinion this makes the
6711 a much better processor.
For certain applications, the L2 cache ... 
behcsiang - Apr 9 2003
Dear All,
I'm confused with the DAT module of DSP/BIOS. I'm
using C6415 chip.
According to the help, before begin any DAT_copy /
DAT_fill tranfer, the DAT... 
Jean-Michel Mercier - Sep 5 2006
Gio,
Unfortunately Jeff's answer address only the DM642 side
while I understand your most issue is on the C6414 side.
You should try to "translate" the proposed C54 code int... 
Jeff Brower - Jun 12 2007
Geckook Xu-
> Thank you for your idea.
> I try internal mem in this time, I can read the data from PC (host).
Ok that's good progress.
> But when I use SDRAM to read d... 
Andrew V. Nesterov - Feb 21 2002
Thanks Tom for your most interesting comments on the CSL, I am
forwarding your email to
Regards,
Andrew
---------- Forwarded message ----------
Date... 
behcsiang - May 22 2003
Hi,
I have a system where the a PMC card with
C6415 act as a daughter board.
Currently, I'm using the method describe
in the "C6000 Peripheral Guide" when i ... 
drenger_gabi - Jul 8 2002
In my system I have a FIFO of width 16 bit on EMIFA connected
physically on bits D[15..0] .
And on the same EMIFA I have an SDRAM width of 64 bit .
I wont t... 
geck...@gmail.com - Jun 3 2007
Can you tell me how to start the pci master read?
my code like this:
config.dspma = (Uns)req-> dstAddr;
config.pcima = (Uns)req-> srcAddr;
config.pcimc = (Uns)GET_BYTE_COUNT(re... 
Indrajit Chakrabarty - May 12 2004
Hi Adrien,
C64XX CPUs have a two-level Internal memory. Upto 256K of L2 can be configured as cache memory. You can have a look at SPRU610 (Two-Level Internal ... 
Bernhard 'Gustl' Bauer - Feb 25 2005
Hi,
I'm not familiar with C6415, but I think this is similar for all C6000.
After boot you have to start c_int00. There some basic initilisation is
made, l... 
Jeff Brower - Jun 14 2007
Geckook-
> Ok, I can read data from PC(host), and save to SDRAM, but I meet
> another problem.
>
> I don't know how to control the communication between PC and DSP.
> ... 
"Joyeau Sylvain (Quartz)" - Mar 20 2008
Hi Albert,
I'm not familiar at all with C6455, more with C6415. Anyway, these both DSP=
s seem to include the same EDMA engine.
Are you sure the transfer has completed ? Hav... 
Yahia Tachwali - Nov 20 2008
Hello everyone,
I am struggling to get the DSP_fft16x16t function in dsplib for c64x working... I am using the C6415 device cycle accurate simulator to verify the code.. The pro... 
presciutti_dgl2k - Nov 18 2005
Hi Shehrzad,
thanks for your replay.
Unfortunately I can't use C55x DSP,
I have strong restriction for IDWT implementation:
- 9/7 IDWT !!!
- 16 bit fixed point ... 