Hi,
I have done convolutional codeing (length =3, rate=1/2) and viterbi hard
decoding. The steps I have followed are:
Data --> Convolutional Encoder --> QPSK Modulation --> Channel -->
Demodulation --> Viterbi Hard Decoding
The above steps give me good result for AWGN channel.
Can any...
Hi,
Can anyone please forward me some literature on Viterbi Equilizer. Also I
would be grateful if some one give me SNR vs BER curve for any MPSK system
when Viterbi Equilizer is employed.
Regards,
...
Hi All:
while looking at GSM literature, i found it quite interesting in how
GMSK is demodulated.
In simulink library, the baseband GMSK demodulator included a hard
decision viterbi decoder. In my mind viterbi decoder is used for error
correction of convolutional encoded channel data. In o...
Hello
I wanted to know the difference that can exist between(among) a flow of
bits that goes out of a decodificador viterbi + Reed solomon and the flow
of bits originally in a transmission of tdt cofdm
That is to say: do I obtain the same result to the exit of the corrector
Reed Solomon with ...
hello everybody
what the customer have specified us for making viterbi decoding
includes some units that i want to know about
"SOFT SLICER"
what it is doing is converting 10 bits I and Q inputs to
two 3-bits output pair....any idea what it is....
and can someone provide some i...
Hi All,
I am learning viterbi equalization to deal with ISI caused by multichannel
effect.
Let us denote L as the channel memory, that means we have L+1 channel
taps. like this figure below. i.g. L=4
In --D--D--D--D--
| | | | |
| | | | |
h0 h1 h2 h3 h4
| |...
How do you compute a soft Viterbi metric?
I have gone through this excellent tutorial on the Viterbi decoder:
http://home.netcom.com/~chip.f/viterbi/tutorial.html
It is for a hard decision decoder, which makes it easy to compute the
metrics.
In the hard decsion case, if I receive [1,1] say,...
Hello, now my question is that can we do viterbi decoding of a
repetition code; for eg, I have an input '1' so I repeat it 20 times
(I know this not good as an error correction code and also as far as
efficient use of channel capacity is concerned, but I want to know
this for knowledge) and vice...
hello,
i'm doing my project in FPGA IMPLEMENTATION OF VITERBI DECODER
.is there any groups to clarify my doubts and if there any links to get the ideas
...
I want to insert a interleaver-deinterlaver in my software for Viterbi.
If i have select r=1/2 and k=7, How many bits of interleaving is a good
option?
...
Dear All,
I am learning how to use viterbi in GSM Channel Equalization. As a newer,
I have some basic questions about this method.
Q1, What I learn from textbook, viterbi can handle bit sequence with some
mistakes, and output correct bit sequence. How can it handle complex data
inputs? Because...
Hi all,
I am using Viterbi and Viterbi algorithm for estimating phase of the
carrier in a 8psk demodulator. I am facing problem relating to cycle
slips and observing that half of my burst is demodulated correctly and
the rest of the burst has a constant phase offset. My training symbol
is able ...
Hi everyone,
I am working on a project of DVB-T now. I try to use the C6416 to
implement the Viterbi decoder. As my known, the co-processor, VCP,
includes in the C6416. Does anyone can give me the C source of Viterbi
decoder using VCP or compatible in C6416?
Thanks in advanced.
yoyo
...
Hi Group,
Is there a power dissipation model for the Viterbi decoder as a
function of the constraint length, the code rate and the operating
data rate??
I know that the answer depends on many other factors such as the
fabrication process, implemention of the Viterbi algo etc. But, I am
loo...
If you are doing a lot of Viterbi decoding and would like a faster
decoder, check out my library of Viterbi decoders that use the vector
instructions on both x86 and PPC CPUs. It's all LGPLed.
http://www.ka9q.net/code/fec
--Phil
...
Hi all,
In zero termination method of convolution encoder, we pad zeros in the end
of each packet.
Should we remove the padded zeros in the viterbi decoder.
...
hi,
i have implemnet soft decision viterbi decoder of
constraintlength 7 on adsp black fin processor.
can anybody sugegst some document regarding
implementation on ADSP. i know the theory of viterbi decoder. I already
implemenetd hard decision decoder on FPGA. Whether r...
Viterbi Input, Branch Metrics, and the TI VCU
What is the input to the (hard-output) Viterbi decoder, and how is a
branch metric computed?
Here are what I think are the correct answers:
Inputs:
The inputs are either hard bits (i.e., x_n \in {-1, +1}) or soft bits
(i.e., x_n \in [-1, +1...
Hi:
Can someone explain to me the meaning of the statement "The noise
tolerance of a Viterbi decoder is x dB"?
Is noise tolerance the same as BER (as measured in the form 10^(-y))?
How are these 2 quants related?
I am using a soft demapper that takes in 16 bit input to generate 4
single-...
Hi all
I want to implement viterbi decoding for frequency selective fading
channel in matlab could u tell me how i should start writing program ?
thanks
Mohd Israil Saifi
Researcher AMU Aligarh (india)
_____________________________________
Do you know a company who employs DSP enginee...
Hi all,
I want to implement soft decision viterbi decoder in FPGA. I have already
implemented hard-decision decoding and the design works fine in xilinx
FPGA. We have implemented "high bit clear circuit" for path metrics
normalization to reduce the area.
Now, i want to implement soft-decision d...
Hi all,
I want to implement soft decision viterbi decoder in FPGA. I have already
implemented hard-decision decoding and the design works fine in xilinx
FPGA. We have implemented "high bit clear circuit" for path metrics
normalization to reduce the area.
Now, i want to implement soft-decision d...
Hi all,
I need to use block viterbi decoder in my project. What should be the
minimum delay required between two blocks of data. Can I input next few
blocks of data while the present block is being decoded. I tend to use
xilinx/lattice IP core.
...
I want to know that for a particular viterbi decoder e.g for 1/2,7 type
,with traceback depth of 48, if input data frame contains 2000 bits ,IS it
possible to correct only upto 4 errors in this data stream and is there any
relation between error correcting capability and location of these erro...
Dear All,
Now I face a problem about the traceback depth of viterbi decoder.
For an example, the convolutional code with coding rate 5/8(the mother
rate is 1/3, puncture vector is [1 0 1 1 0 0 1 0 1 0 0 1 1 0 1]),
constraint length K=7. I use the Bernoulli Binary Generator as the sig...
What I am trying to do is increase the throughput of a viterbi decoder
that is currently contrained by the FPGA clock rate.
What you say is right. The decoder would have to operate on symbols
rathter than on bits. I may have been incorrect to assume that this
was tied to the use of radix 2 b...
Hello,
I am trying to add the ability to de-puncture to my viterbi decoder, but I
am unsure of how to determine where to insert my "don't care" bits. If I
have received a stream of bits that are encoded, how is it possible to
find the proper location to place the bits that were punctured out at ...
Hi
Does anyone know where I can find the code for implementing the subject
decoder? Ideally, I am looking for a TI application note or some similar
document. I searched the TI website but couldn't find a lot there. Note
that my DSP would not have a viterbi coprocessor(VCP) so the
implementations ...
Hi all,
I implemented an OFDM receiver in C++ and it turs out that some parts are
bottle necks for the speed, like e.g. Viterbi decoding and RS decoding.
Does anyone know if there is a hardware based decoding solution on the
market? Ideally it would be a PCI card for PC and configurable for
dif...
Hi.
I am trying to write a program to verify the speaker.
I'm confusing with the viterbi algorithm in Hidden Markov Model(HMM).
As I know, the viterbi algorithm is used to find the best path of the
sequence.
I would like to know how this algorithm can help when I want to verify
whether t...
I have implemented a Viterbi soft decision (1/2 k=7) for a BFSK
modulation.
I need to know the minimum level deeper into the trellis to get symbol.
In a book, i read something about a good value is 4 or 5 times the
constraint lenght.
Now, for example, after 32 levels (or states) i get t...
Hi all,
I have this doubt in implementation of viterbi decoder in FPGA
While the trace-back unit decodes the single bit after tracing back the
path of length 5*L, next input to the viterbi decoder should not be given.
But if the input data is continuous, trace-back operation should be
comp...
Hi all,
Can anybody please tell me if there is any different between the viterbi
algorithm for Convoluntional code and that for Space time trellis codes.
I have tried using the decoding approach for convoluntional and trellis
coded modulation (TCM) to decode my 2 states BPSK space time trellis co...
Hi all,
Can anybody please tell me if there is any different between the viterbi
algorithm for Convoluntional code and that for Space time trellis codes.
I have tried using the decoding approach for convoluntional and trellis
coded modulation (TCM) to decode my 2 states BPSK space time trellis co...