Hi all,
My DSP does not support a 64bit + 64bit = 64bit addition, it only supports
a 32bit + 32bit = 32bit or a 32bit + 40bit = 40bit addition.
Does anybody know a fast and smart algorithm to co...
Hi all,
does anybody know an algorithm for time synchronization between a GPP
and a DSP? The GPP has to be the time master. This means that you can
only adjust the DSP time to the GPP time.
Al...
Hi all,
I am using the C6416 fixpoint dsp from TI. My currently usecase is as
follow. The SDRAM is connected to EMIFA CE0. A Blockram is connected on
EMIFA CE1. The L2 memory is configured is 256...
Hi all,
I'm working with the C64xx DSP from TI and trying to interface a
blockram within the attached FPGA by using the EMIF. It is a 16 Bit
interface. The FPGA is attched to CE1 and CE2 Space. T...
Hi all,
I am currently working with the emif module on a C64xx DSP. The SDRAM
is attached to CE0 address space and clocked with 100MHz all memory
accesses are 32Bit accesses. The CE1 and CE2 addr...
Hi
I posted a similar question a few days ago and got a good answer. But
there is still one thing I don`t understand, maybe anybody could help
me again.
My problem is still the segID. In some ...
Thanks for the immediate reply. It works fine.
I found another manual about DSP/BIOS "SPRU423" with an small example.
But I think I will report it to TI, anyway.
Markus
mlimber schrieb:
>...
First of all thanks for the explanation. I want to implement a
feedforward method, is there a more detailed explanation of the
correlation problem at Kuo and Morgan "Active noise control Systems".
...
Thanks for your prompt reply. When I insert an delay into the primary
path the result would be much better. OK I think this problem is known
as "causality problem".
And the crosscorrelation between...
Hi,
some days before I asked you something about the LMS and the NLMS.
Now I am would take one step forward to the FXLMS. I have achieved
very good results in signal attenuation with the NLMS ...