Hi All,

 

I have implemented the 32 bit fixed point multiplication as described in EE-186 application note by Analog Devices. I have briefly described it here...

 

op1(32)= op1H op1L (op1H and op1L each are 16 bit)
op2(32)= op2H op2L (op2H and op2L each are 16 bit)
  -------------
Ans =     32------->op1L*op2L  -- (1) (right shift 32 bits)
         16--->op1H*op2L   -- (2) (right shift 16 bits)
         16--->op1L*op2H   -- (3) (right shift 16 bits)
     0->op1H*op2H   -- (4) (no shift)

As the answer is to be restricted in 32 bit the first multiplication is ignored. And the addition of (2),(3) & (4) give the final ans.

 

Now the problem is it takes too many cycles to carry out the multiplication (even more than the floating point multiplication).

 

I have checked this in Visual DSP++ 4.0 software (simulated for BF535).

Can anyone please tell me why this would happen?? Also, is there any optimised way to carry out multiplication and other mathematical operations for the DSP processor?? (I do not have much idea of the assembly language of the DSP so I have to restrict my self to program in C only).

 

Any help will be highly appreciated.

 

Thanks a lot,

B.S.D.