Visual dsp 3++ problem. Even After a software reset (while working on=20
session name ADSP 21061 EZ-KIT VIA HPPCI)I find the values of register=20
file holding some garbage value. Since software resets processor=20
status I am expecting register values to be zero.I scan through the=20
forum and what I find there is (I presume it is)  that a procedure=20
should be written to ensure register file all zeros after reset. No=20
such problem while working on simulator ADSP 21061.so what is the=20
problem

             Thanking all in advance=85..
                                   canbruce

=20

On Thu, 7 Jun 2007, canbruce_contact wrote:

> Visual dsp 3++ problem. Even After a software reset (while working on
> session name ADSP 21061 EZ-KIT VIA HPPCI)I find the values of register
> file holding some garbage value. Since software resets processor
> status I am expecting register values to be zero.I scan through the
> forum and what I find there is (I presume it is)  that a procedure
> should be written to ensure register file all zeros after reset. No
> such problem while working on simulator ADSP 21061.so what is the
> problem

I can't find anything in the manual that says what the state of the data
register file is after reset.  It is safe to assume it is randomized bits.
The simulator is being nice, but it's also true they can't really simulate
random hardware.  It's best to set the initial values to what you want
before you begin processing (and that's a good rule no matter what the
processor or process for that matter).

Patience, persistence, truth,
Dr. mike

Thanks DR. Mike for your suggestion.It seems to work fine.
NOw i dont have any problem......

but i came across in the manual that processor status is clear due to software reset .So my
question is whether clearing processor status involves clearing all registers?Any suggestion
will be highly appreciated...

On Fri, 8 Jun 2007 c...@yahoo.co.in wrote:

>
> but i came across in the manual that processor status is clear due to
>software reset .So my question is whether clearing processor status
>involves clearing all registers?Any suggestion will be highly
>appreciated...

Only some registers are cleared (or set) during reset.  Some bits in some
registers are "undefined" on reset.  All registers are independent, so
clearing some will not affect others.  Some instructions will not affect
any bits in the status register, even though they do affect data
registers.  Operations on the status register will not change the contents
of any other register.  If they did, they would not be "status" bits!

Patience, persistence, truth,
Dr. mike