hi,

I am using the Tigersharc ts201. I want to create a assembly 
subroutine from c. Though I can't remember which registers to push pop
addresses for entry and exit. I tried simulating one of the published 
FFT's though I still can't seem to figure out which registers to use.
Does any one know where in the published manuals where the answer 
might be? 
Jon

Hi,

In Chapter 1 of the TigerSharc VDSP++ 4.5 C Compiler manual, there is a
subsection on C/C++ to Assembly Interfacing.

Hope that helps.

Cheers,

George

www.kaztek.com <http://www.kaztek.com/>

  _____  

From: a...@yahoogroups.com [mailto:a...@yahoogroups.com] On Behalf Of
duncwood
Sent: Tuesday, June 26, 2007 3:18 PM
To: a...@yahoogroups.com
Subject: [adsp] Tigersharc calling assembly from 'C'

hi,

I am using the Tigersharc ts201. I want to create a assembly 
subroutine from c. Though I can't remember which registers to push pop
addresses for entry and exit. I tried simulating one of the published 
FFT's though I still can't seem to figure out which registers to use.
Does any one know where in the published manuals where the answer 
might be? 

Jon

Hi

=20

I=92m trying to implement a boot mechanism (EEPROM SPI) working like that:=
=20

I have 3 dxe=92s in my EEPROM

N=B0 1: execute always and check value of switch: if switch is ON boot on D=
XE
N=B02 in EEPROM, else boot on DXE N=B03 in EEPROM

=20

I don=92t find example on ADSP21369, but it exist and work on Blackfin (EE2=
40
: init code and multi dxe). Do you know if there is something similar for
Sharc, do you have an example or documentation which can help me?

=20

Thanks in advance

=20

Stephane,

I think you are going to need to write a 
bootloader that follows the internal bootloader.

We do something like this for our SHARC boards. 
In our bootloader, we upload an *.ldr file via 
USB or RS-232 and sometimes configuration files for an FPGA.

The process is that the internal bootloader loads 
the custom bootloader. This bootloader then uses 
some kind of external mechanism to determine 
which program should be loaded into memory. If 
you are a little clever, your application will 
completely overwrite the bootloader (the ram 
image) so you don't need to worry about shared memory.
I can't share the details of our code, since it is proprietary to our boards.

There is an ADI ap note that you will find helpful:

http://www.analog.com/UploadedFiles/Application_Notes/800287157EE_177_SHARC_SPI_Slave.Booting.R
ev.3.01.07.pdf

Al Clark
Danville Signal Processing, Inc.
--------------------------------------------------------------------
Purveyors of Fine DSP Hardware and other Cool Stuff
Available at http://www.danvillesignal.com

At 03:07 AM 6/28/2007, Stéphane GOUEL - ARBOS wrote:

>Hi
>
>I’m trying to implement a boot mechanism (EEPROM SPI) working like that:
>
>I have 3 dxe’s in my EEPROM
>
>N° 1: execute always and check value of switch: if switch is ON boot on DXE
>N°2 in EEPROM, else boot on DXE N°3 in EEPROM
>
>I don’t find example on ADSP21369, but it exist and work on Blackfin (EE240
>: init code and multi dxe). Do you know if there is something similar for
>Sharc, do you have an example or documentation which can help me?
>
>Thanks in advance