Hi! 

I have doubt about the SDC....... 

When we are configuring the SDRAM in video applications......they are configuring the registers
with values(Iam attaching those values) for the optimum performance of SDRAM...................

here i din't know what is the "optimum performance" and the SCLK is changing to 118.8
122 and 133Mhz based on values.... 
As far as i know to change the SCLK frequency we need to change the SSEL bits but, here we are
not changing these............ 

But the SCLK values are changing why i don't know.... 
and also for any operation using SDRAM we have to use only these values or can we use any other
values...........