I would like to slave the S/PDIF transmitter rate on my ADSP-21364 to the rate of the
S/PDIF receiver input.  I assume this is possible, but I cannot figure out how to provide the
oversampling clock required by the S/PDIF transmitter.  Specifically:

I am using SPORT0 to drive the S/PDIF transmitter. In the SRU, I connect:
DIR_CLK_O to both DIT_CLK_I and SPORT0_CLK_I
DIR_FS_O to both DIT_FS_I and SPORT0_FS_I
SPORT_DA_O to DIT_DAT_I

But what do I connect to DIT_HFCLK_I?  There does not seem to be a DIR_HFCLK_O signal available
for this.

Thanks!