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Discussion Groups | Analog Devices DSPs | SDRAM Interface to ADSP 21065l

Technical discussions related to Analog Devices DSPs (including Blackfin, TigerSHARC, SHARC and ADSP-21xx DSPs).

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SDRAM Interface to ADSP 21065l - vivek aggarwal - Sep 10 11:27:00 2001

Hi I am facing a problem when writing to the SDRAM thru the SHARC, The SDRAM is connected to the Bank 2(MS2) of the DSP, Internally the SDRAM has 4 Banks, when ever i write to one memory bank of the SDRAM it writes to all the four banks, I have checked the BA0 and BA1 address lines, and ensured that they are not shorted. I have checked the IOCTL and SDRDIV register setting for the same. It looks right to me in all aspects. I am just doing a single word write to one bank and the same value is getting written to all the four banks. Can anybody help me with respect to this. Regards Vivek

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Re: SDRAM Interface to ADSP 21065l - Kenneth Porter - Sep 11 4:50:00 2001

On Mon, 10 Sep 2001 16:57:42 +0530, vivek aggarwal wrote: > I am facing a problem when writing to the SDRAM thru the SHARC, > The SDRAM is connected to the Bank 2(MS2) of the DSP, Internally the > SDRAM has 4 Banks, when ever i write to one memory bank of the SDRAM it > writes to all the four banks, > I have checked the BA0 and BA1 address lines, and ensured that they are > not shorted. Try a scope loop: Write the same word to one bank repeatedly, toggling a flag line in the first instruction in the loop. Then look at the SDRAM control signals with a scope, triggering on the flag line to get an idea of where in the write cycle each op occurs. (Warning, untested code) #include <def21065l.h> bit set mode2 FLG0O; r0 = 0xa5a5a55a5a5a; loopit: bit set astat FLG0; bit clr astat FLG0; dm(0x02000000) = r0; jump loopit;

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