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Hi all Does anybody has worked on Quad Sharc ( ADSP-14060)? I want to know that how(at what address) interrupt vector table of each sharc are mapped also How can we boot other sharcs from the master sharc thanking you all Harshad SAMEER,IITB

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I'm also working with the AD14060 Quad SHARC. The interrupt vector table for each ADSP-21060 resides in its own internal memory, at 0x20000 for each. The Multiprocessor Boot options are discussed in the ADI's ADSP-2106x SHARC User's Manual Chapter 11 (System Design). One master SHARC can boot the others (the H/W setup is described). There are other options; such booting from a Host, boot via the link port and all SHARCs boot in turn from a single EPROM (the option I'm using). Analog Devices provides three ADSP-21060 boot loaders with VisualDSP++ that support link host or EPROM booting for multiprocessors (I've had to rewrite the boot loader meet our POST and other system requirements). I recommend reading the User's Manual, especially chapters 5 (Memory), 7 (Multiprocessing) and 11 (System Design) and the following Engineer To Engineer notes (EE-56, EE-107, EE-108) provided by Analog Devices. I found these to be extremely helpful. http://www.analog.com/library/applicationNotes/dsp/32_devTools/ee_107.pdf http://www.analog.com/library/applicationNotes/dsp/32_devTools/EN108.pdf http://www.analog.com/library/applicationNotes/dsp/32_Processors/ee_56.pdf Regards, Don Waldron > -----Original Message----- > From: Harshad S Dave [SMTP:] > Sent: Wednesday, March 20, 2002 5:09 AM > To: adsp > Subject: [adsp] @ QUAD SHARC > > Hi all > > Does anybody has worked on Quad Sharc ( ADSP-14060)? > > I want to know that how(at what address) interrupt vector table of each > sharc are mapped > also How can we boot other sharcs from the master sharc > > thanking you all > Harshad > SAMEER,IITB > > > _____________________________________ > /groups.php3

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On Wed, 20 Mar 2002, it was written: > I'm also working with the AD14060 Quad SHARC. The interrupt vector table > for each ADSP-21060 resides in its own internal memory, at 0x20000 for each. as per my knowled > The Multiprocessor Boot options are discussed in the ADI's ADSP-2106x SHARC > User's Manual Chapter 11 (System Design). One master SHARC can boot the > others (the H/W setup is described). There are other options; such booting > from a Host, boot via the link port and all SHARCs boot in turn from a > single EPROM (the option I'm using). > > Analog Devices provides three ADSP-21060 boot loaders with VisualDSP++ that > support link host or EPROM booting for multiprocessors (I've had to rewrite > the boot loader meet our POST and other system requirements). > > I recommend reading the User's Manual, especially chapters 5 (Memory), 7 > (Multiprocessing) and 11 (System Design) and the following Engineer To > Engineer notes (EE-56, EE-107, EE-108) provided by Analog Devices. I found > these to be extremely helpful. > > http://www.analog.com/library/applicationNotes/dsp/32_devTools/ee_107.pdf > http://www.analog.com/library/applicationNotes/dsp/32_devTools/EN108.pdf > http://www.analog.com/library/applicationNotes/dsp/32_Processors/ee_56.pdf > Regards, > > Don Waldron > > > -----Original Message----- > > From: Harshad S Dave [SMTP:] > > Sent: Wednesday, March 20, 2002 5:09 AM > > To: adsp > > Subject: [adsp] @ QUAD SHARC > > > > > > > > Hi all > > > > Does anybody has worked on Quad Sharc ( ADSP-14060)? > > > > I want to know that how(at what address) interrupt vector table of each > > sharc are mapped > > also How can we boot other sharcs from the master sharc > > > > thanking you all > > > > > > Harshad > > SAMEER,IITB > > > > > > > > > > > > > > > > _____________________________________ > > /groups.php3 > > > > > > >

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