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Since we are on this topic,

I think that there is a serious dillema, while practically realising an FFT 
core: fixed point vs. floating point.
I have stated some pro's and con's, and I would like to know what you all 
think about it:
floating point, IEEE standard:
pro:
-for the same number of bits, higher dynamic range
-more resistance to overflows (no need to do scaling, block floating point, 
convergent BFP, etc)
con:
-more area than a fixed - point implementation (bigger add-subtractors, 
multipliers)
-more sensible to the nature of the signal

fixed point:
pro:
-smaller area (add/subtractors, mult.)
con:
-more prone to overflow, therefore the need to scale, BFP, CBFP, etc.

Of course, it all may depend on your implementation technique, if it's on a 
DSP, FPGA, or directly in ASIC.

If I'm wrong on any of the above, please let me know.

Radu
	

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