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Help needed in designing chirp generator and pulse compressor using iir
filters (this amounts to using an IDT, I guess).

I want to generate chirp using an IIR filter. 

I want to send a pulse to the iir filter and expect an output which is a chirp
signal starting at f0 and ending at f1 in time duration t0.

Also, I want to use the iir filter to generate pulse when fed with the above
chirp.

5% error (distortion) is acceptable.

I have an ATMega8 @ 16MHz to do this processing. The 10 bit ADC can work at
66Ksamples per sec (approx).

For starters,

f0 is 3 KHz
f1 is 7 KHz
T0 is 4 ms
Can any one help me with the design and calculations for both the filters.

(a) Delay of each tap.
(b) Minimum number of taps.
(c) Method to calculate no of taps and co-efficients.
(d) Calculating bandwidth of the chirp.
(e) Calculating distortion

And if possible, a sample design for above parameters.

Thanks and regards

Ketaki

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Ketaki-

Some confusion here...

1) You mention IIR filter then you mention "taps".  Taps are used in
FIR filters, one
tap per coefficient.  For IIR filters, normally people refer to "delay
storage
elements", which can be less than the number of coefficients, depending on
the form
of the filter.

2) Filters are not reversible transforms.  The result is in the same domain
(time). 
You can't generate what you started with by repeating the IIR filter on the
output. 
Maybe you are thinking FFT.

3) Also I might mention that using IIR filter to generate a chirp, while that
should
work in theory, will require a marginally stable filter, because the output has
to
"ring" for quite a long time to avoid amplitude decay.  Since you are
using a
fixed-point processor, that's going to make it difficult to keep such the IIR
filter
stable for a long response time.  You may need 32-bit precision coefficients.

-Jeff

> Help needed in designing chirp generator and pulse compressor using iir
filters (this amounts to using an IDT, I guess).
> 
> I want to generate chirp using an IIR filter.
> 
> I want to send a pulse to the iir filter and expect an output which is a
chirp signal starting at f0 and ending at f1 in time duration t0.
> 
> Also, I want to use the iir filter to generate pulse when fed with the
above chirp.
> 
> 5% error (distortion) is acceptable.
> 
> I have an ATMega8 @ 16MHz to do this processing. The 10 bit ADC can work at
66Ksamples per sec (approx).
> 
> For starters,
> 
> f0 is 3 KHz
> f1 is 7 KHz
> T0 is 4 ms
> 
> Can any one help me with the design and calculations for both the filters.
> 
> (a) Delay of each tap.
> (b) Minimum number of taps.
> (c) Method to calculate no of taps and co-efficients.
> (d) Calculating bandwidth of the chirp.
> (e) Calculating distortion
> 
> And if possible, a sample design for above parameters.
> 
> Thanks and regards
> 
> Ketaki

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