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Discussion Groups | TMS320C28x | [F2812 EZDSP] Inaccurate timing executing code relocated from Flash

Technical discussions about the TI C28x DSPs (including the C2810, C2811, C2812, F2801, F2806, F2808, F2810,, F2811, F2812, R2811 and R2812).

  

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[F2812 EZDSP] Inaccurate timing executing code relocated from Flash - seankuay - Jan 9 3:47:00 2006



Hi Expers

I am now using the eZdsp board to perform some tasks on the GPIO of
TMS320f2812 dsp controller, 150 mhz. PROBLEM SCNENARIO:
===================
1. When i run from JTAG emulator (execute completely in RAM), i am
able to control the output timing of GPIO pin very accurately by
6.7ns per NOP operation (1 isntruction). This means i can get the
150 Mhz as state by the.
HOWEVER, when i burn my code into the flash using the flash
programmer tool in CCS v2, i can't get exactly the same 6.7ns per
cycle. I have copied the code from flash to HO SARAM, as below:

//****in my C file..
#pragma CODE_SECTION(dataMgmt,"ramfuncs");
...
MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);
...

//****in the linker.cmd file,
ramfuncs : LOAD = FLASHA,
RUN = RAMH0,
LOAD_START(_RamfuncsLoadStart),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
PAGE = 0

What i get now is that..
i can only get 8.3ns per NOP operation, which is only roughly 120
MIPS. I understand that running from flash will be slow, but i have
already copied the code from flash to HO SARAM. I have confirmed
this by checking the linker output map file..

// the linker output MAP file... 0x3f66xx is still in flash,
0x3f80000 is beginning of dsp internal RAM
003f664b _RamfuncsLoadStart
003f685e _RamfuncsLoadEnd
003f685e _PieVectTableInit
003f7ff8 _CsmPwl
003f8000 _RamfuncsRunStart
003f8000 _InitFlash
003f8016 _pieCDelay
003f801d _dataMgmt

FYI, i have enabled the flash pipelining mode, and also enable the
PLL..

//enable flash pipeline mode
FlashRegs.FOPT.bit.ENPIPE=1;

//xclkout, sysclkout initialization
SysCtrlRegs.PLLCR.all=0xa;
XintfRegs.XINTCNF2.bit.XTIMCLK=0x0; //if xtimclk=0, xtimclk=sysclk/1
XintfRegs.XINTCNF2.bit.CLKMODE=0x0; //if clkmode=0, xclkout NOT
divide QUESTIONS:
===========
1. Is my way of relocating the code wrong??
2. What can possibly cause this? Is it what it's supposed to be? why
i can get the exact timing in jtag emulation mode, but not running
from flash even though i have relocated the code?
3. BTW, is there any other easier way to relocate code? I want to
relocate the whole section, for eg. the .cinit, .text, .pinit or
etc. straight away to RAM, rather than relocating function by
function by using #pragma Really really Thanks




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