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Discussion Groups | TMS320C28x | simulating Interrupt Routine

Technical discussions about the TI C28x DSPs (including the C2810, C2811, C2812, F2801, F2806, F2808, F2810,, F2811, F2812, R2811 and R2812).

  

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simulating Interrupt Routine - nefandous45 - Mar 27 12:44:26 2008



I've been trying to simulate ISR in CSS of Timer0 and find that TIF 
bit is set but PIEIFR bit is NOT SET.

after manually setting PIEIFR bit the the Vector address is NOT taken 
from PIE vector table but from Vector table in Bootrom even though 
ENPIE (enable PIE bit) is set.

could someone guide me?
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Re: simulating Interrupt Routine - chirag jagadish - Mar 28 6:23:52 2008

not sure if you are already using the tidcs examples
  example in tidcs - ti document sprc097 gives example of using timer 0 ISR
  instead of changing the address in PIE, it creates a new ISR function within main program and
maps the interrupt adress to it
  try to start from the examples and modify the code from there

nefandous45 <n...@gmail.com> wrote:
          I've been trying to simulate ISR in CSS of Timer0 and find that TIF 
bit is set but PIEIFR bit is NOT SET.

after manually setting PIEIFR bit the the Vector address is NOT taken 
from PIE vector table but from Vector table in Bootrom even though 
ENPIE (enable PIE bit) is set.

could someone guide me?

------------------------------------

Check Out Industry's First Single-Chip, Multi-Format, Real-Time HD Video Transcoding Solution
for Commercial & Consumer End Equipment: www.ti.com/dm6467

You can post a message or access and search the archives of this group on DSPRelated.com:
http://www.dsprelated.com/groups/c28x/1.php

_____________________________________




(You need to be a member of c28x -- send a blank email to c28x-subscribe@yahoogroups.com )