Discussion Groups | TMS320C3x | interupt enable
Technical discussions about the TI C3x DSPs (including the C31, C32 and C33 DSPs).
interupt enable - Arup - Jun 10 21:19:00 2004
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Hi everyone, The TMS320C3x user's guide mentions GIE bit in ST reg is set to 0 on reset. In the source code of the communication kernel (given in c31 user manual), which the DSP executes after bootloading, the timers and the stack are initialized and DSP goes into infinite spin loop, without enabling global interrupt in ST reg. So how does the DSP reponds to INT2 interrupts necessary for host communication? Thanks, Arup |
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