disabling UART on 5402 DSK; I/O memory bug | TMS320C54x

Technical discussions about the TI C54x DSPs (including the c5401, c5402, c5402a, c5404, c5407, c5409, c5409a, c5410, c5410a, c5416, c5420, c5421, c5441, c549, c5470 and c5471).

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Hi all, it's the rookie again. I want to read from the external mem. interface on the 5402 DSK, but I've heard that the CPLD device that "directs traffic" on the board between peripherals has a programming error and that I will not be able to access i/o mem. space above 7FFFh. A suggested workaround is to diable the UART and use it's space below 8000h. Can anybody tell me how to disable the UART? I've looked in the CPLD CNTL reg and find that I can set the INT1SEL bit to have the daughterboard trigger INT1, instead of the UART. Is this what they meant by disabling the UART? Any help is appreciated. Mike

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I use the IO memory space above 8000 with no problem. By setting the INT1SEL the UART is not disabled, but the interrupts generated from the UART will not be directed to the CPU. Have you checked the status of the DMSEL setting? If DMSEL is low, the data bus is not connected to the daughterboard connectors. You'll need to set the DMSEL, if you want to access the IO memory space above 8000 through the expansion connectors. When changing the DMSEL bit, be sure you are running code from the on-chip DARAM, because the SRAM and flash are disabled when the off-board memory is enabled. You can see all that in the schematics ----- Original Message ----- From: "mdl8736" <> To: <> Sent: Sunday, July 21, 2002 10:26 AM Subject: [c54x] disabling UART on 5402 DSK; I/O memory bug > Hi all, it's the rookie again. I want to read from the external mem. > interface on the 5402 DSK, but I've heard that the CPLD device > that "directs traffic" on the board between peripherals has a > programming error and that I will not be able to access i/o mem. > space above 7FFFh. A suggested workaround is to diable the UART and > use it's space below 8000h. Can anybody tell me how to disable the > UART? I've looked in the CPLD CNTL reg and find that I can set the > INT1SEL bit to have the daughterboard trigger INT1, instead of the > UART. Is this what they meant by disabling the UART? Any help is > appreciated. > > Mike > > _____________________________________

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Discussion Groups | TMS320C54x | disabling UART on 5402 DSK; I/O memory bug

disabling UART on 5402 DSK; I/O memory bug - mdl8736 - Jul 21 7:26:00 2002

Re: disabling UART on 5402 DSK; I/O memory bug - Georgios Chatzigeorgiou - Jul 22 14:43:00 2002