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Discussion Groups | TMS320C54x | Processing time issues on TMS320VC5402 DSK

Technical discussions about the TI C54x DSPs (including the c5401, c5402, c5402a, c5404, c5407, c5409, c5409a, c5410, c5410a, c5416, c5420, c5421, c5441, c549, c5470 and c5471).

  

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Processing time issues on TMS320VC5402 DSK - JACOB CHACKO - Sep 5 8:20:00 2002



Hi,

I am currently busy implementing a voice privacy system that uses the
Digital Signal Processing method TFSP. i.e. Time and Frequency segment
permutation. It basically divides the input digital sample signal into
the different frequency components using Quadrature mirror filters. It
uses a scrambler on the transmitter section and a de-scrambler on the
receiver section.

I don’t intend to bore you with all the maths but infact I need your
assistance with regard to completing the project. The problem my
fellow friends and me are experiencing is of the processing time
taking longer than the sampling period of 8000 Hz. This is causing the
output to become distorted.

The project is being implemented on the TMS320VC5402 DSK kit and we
are writing code in C using the code composer studio. I intend to
perform all my processing within each sampling instant but it seems as
if as soon as my processing load increases , the signal becomes
distorted, which in turn implies that I am missing samples.

I wonder if you could help me with regard to this problem that we are
experiencing, or infact provide us with any information that might
help us with the project.

I appreciate your assistance in the matter.





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Re: Processing time issues on TMS320VC5402 DSK - wavetrain3000 - Sep 5 15:08:00 2002

I assume you've done rough estimates to convince yourself
that the signal processing you want to do actually fits in
the 8000 hz sampling intervals. Given that, I have a couple
suggestions:

- don't assume that "the output is distorted" because
you're missing samples: put a real detector in your
code (e.g. halt if the next sample arrives before
the current one is processed, or if the processing takes
more than about 120us) so you know directly what's
going on
- the DSP debugger and run-time environment can disrupt
timing; if you're working via HPI the DSP gets halted
at a periodic rate for polling (don't know the details,
but I observed the phenomenon directly on one of my
real-time systems), and any sort of run-time interaction
between debugger and DSP (printf, DSP/bios communication)
can be much more disruptive than you might think
- if you have routines that seem much slower than you
expect, and they've compiled reasonably well, recall that
external memory is much slower than internal

Ken Sinclair
Wavetrain - Wireless computing and embedded system design





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Re: Processing time issues on TMS320VC5402 DSK - Benjamin Chan - Sep 5 19:53:00 2002

If there is peak MIPS issue in your processing, then
then try use buffer processing instead of sample by
sample processing, in which you can avoid peak
processing time in a particular sample time.

Also check what is the clocking Mhz of the C5402. If
you are not using 100Mhz, you can also try set it to
see if that helps. But beware of the memory wait
states setup if you are using external memory. If
possible, try put critical code and data buffers in
onchip memory.

Good luck.
Ben
--- JACOB CHACKO <> wrote:
> Hi,
>
> I am currently busy implementing a voice privacy
> system that uses the
> Digital Signal Processing method TFSP. i.e. Time and
> Frequency segment
> permutation. It basically divides the input digital
> sample signal into
> the different frequency components using Quadrature
> mirror filters. It
> uses a scrambler on the transmitter section and a
> de-scrambler on the
> receiver section.
>
> I don&#58809; intend to bore you with all the maths
but
> infact I need your
> assistance with regard to completing the project.
> The problem my
> fellow friends and me are experiencing is of the
> processing time
> taking longer than the sampling period of 8000 Hz.
> This is causing the
> output to become distorted.
>
> The project is being implemented on the TMS320VC5402
> DSK kit and we
> are writing code in C using the code composer
> studio. I intend to
> perform all my processing within each sampling
> instant but it seems as
> if as soon as my processing load increases , the
> signal becomes
> distorted, which in turn implies that I am missing
> samples.
>
> I wonder if you could help me with regard to this
> problem that we are
> experiencing, or infact provide us with any
> information that might
> help us with the project.
>
> I appreciate your assistance in the matter. > _____________________________________ __________________________________________________





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Re: Processing time issues on TMS320VC5402 DSK - Georgios Chatzigeorgiou - Sep 5 22:20:00 2002

Hi Jacob

I've encountered the same problem (not with the same algorithm).
There are some quidelines presented below (the order is irrelevant), which
may
solve your problem.

1. Use the Optimizer
If you are writing C code you'd propably want to use the optimizer. There
are various levels
of optimization effort, try to experiment to use which best fits your app (I
would suggest level 3).

2.Allocate Time Critical Code In the on-chip memory (DARAM)
Furthermore, if you can arrange your code so that 0080 to 1FFF contains
data, and 2000-3FFF contains executable code, the DARAM can be fully
utilized.

3. Clock speed and Wait States
Make sure the DSP is clocked at the highest speed (100MHz), and that the
wait states for the SRAM are set to 1 (and the multiplier is off).

4. Use Assembly
The DSP works better with assembly. I managed to make the polyphase
filterbank of the MP3 five times faster using assembly instead of C.
Parrellel load, store, multiply, add, substract can save you from a lot of
cycles (not to mention the numerous application specific instructions that
can save a lot of time).

Hope I've helped
George Chatzigeorgiou




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