Technical discussions about the TI C54x DSPs (including the c5401, c5402, c5402a, c5404, c5407, c5409, c5409a, c5410, c5410a, c5416, c5420, c5421, c5441, c549, c5470 and c5471).
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I'm working on examining the current drain on a new project, and am coming up with some odd results. Its my understanding that IDLE 3 turns off the PLL, so it shouldn't matter what speed I have reviously set the PLL to, right? my test powers up the peripherals, but then drops into an infinite loop with IDLE 3 in the middle of it. I am seeing about a 130mA current draw difference between setting the PLL to its defauly /2 state and x8 mode (19.2MHz clock). Is this normal? According to the c5416 docs I should be seeing a max of about 100mA of drain when running at 160MHz, but I seem to be able to easily exceed this. Thanks, Brian ----------------------------------------------------- Brian C. Lane (W7BCL) Programmer www.shinemicro.com RF, DSP & Microcontroller Design |