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Discussion Groups | TMS320C54x | c5416 memory map

Technical discussions about the TI C54x DSPs (including the c5401, c5402, c5402a, c5404, c5407, c5409, c5409a, c5410, c5410a, c5416, c5420, c5421, c5441, c549, c5470 and c5471).

  

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c5416 memory map - lax man - Jul 29 12:27:00 2003



hello all

i need some help on c5416 memory map.

my cmd file look something like this.

MEMORY {

PAGE 0: /* program space */
DARAM0 (RWX) : o=000080h l=003f80h
VECS0 (RWX) : o=007f80h l=000080h

EXT (RWX) : o=008000h l=004000h
ROM (R ) : o=00c000h l=003f00h
RSV1 (R ) : o=00ff00h l=000080h
VECS1 (RWX) : o=00ff80h l=000080h

SARAM03 (RWX) : o=028000h l=008000h
SARAM47 (RWX) : o=038000h l=008000h

PAGE 1: /* Data Space */

DARAM2 (RWX) : o=004000h l=003f80h
DARAM47 (RWX) : o=008000h l=008000h
}

SECTIONS
{
.intvecs : > VECS0 PAGE 0
.text : > SARAM47 PAGE 0
.cinit : > SARAM47 PAGE 0
.pinit : > SARAM47 PAGE 0
.switch : > SARAM47 PAGE 0
.sysmem : > DARAM47 PAGE 1
.stack : > DARAM47 PAGE 1
.const : > DARAM47 PAGE 1
.cio : > DARAM47 PAGE 1
.bss : > DARAM47 PAGE 1
.data : > DARAM47 PAGE 1
}

1) In c5416 we have 128 pages each of size 64k
(program space),how will i address SARAM03,SARAM47.if
i do as shown above, CCS will give an error.

2) i set PMST in GEL file to 0x2c.Even, i used
DSP/BIOS too for placing the compiler sections...there
also it's giving the same error.
3) since there are 23 address lines, i can address
upto 8M words, if so, what modifications must be done
in my CMD file.
4) since XPC register determines the page no,how can
i set xpc to point to two different pages @ the same
time.
i checked the MAP file,there is no overflow.

Thanks in advance
-Lakshman
__________________________________





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want help regarding memory map of 5416 - snehal joshi - Jul 31 11:40:00 2003

Hi
I am new to c54x family. I am working on
implementation of speech codec on 54x.
I have following memory requirement (which i get from
memory map file generated b c54x)

.text 6db6
.cinit e5
.const 38dd
.bss d59
.cio 120

here is my cmd file

-m memory_map.map
-stack 0x1800
-heap 0x800
MEMORY
{
PAGE 0: VECT: origin = 0xff80, len = 0x80
P_DARAM47:origin = 0x28100, len = 0x7000
PAGE 1:
USERREGS: origin = 0x60, len = 0x1c
BIOSREGS: origin = 0x7c, len = 0x4
D_DARAM03: origin = 0x100, len = 0x7000
D_DARAM47: origin = 0x8000, len = 0x8000
}
SECTIONS
{
.cinit: {} > P_DARAM47 PAGE 0
.text: {} > P_DARAM47 PAGE 0
.pinit: {} > P_DARAM47 PAGE 0
.switch: {} > P_DARAM47 PAGE 0
.vectors: {} > VECT PAGE 0
.sysmem: {} > D_DARAM03 PAGE 1
.stack: {} > D_DARAM03 PAGE 1
.const: {} > D_DARAM03 PAGE 1
.cio: {} > D_DARAM03 PAGE 1
.bss: {} > D_DARAM03 PAGE 1
.data: {} > D_DARAM03 PAGE 1
}

Here is my main function

main()
{
Veriable declaration;
File opening;
decoder initialization;
while(fread(data from input file) == frame_size)
{
decode;
fwrite(write data to output file);
}
file close;
}

My Problem:
Upto file opening there is no problem. But during this
time value of cpl = 1 i.e. direct addressing

mode using SP.
but after decoder initialization value of cpl is
changed to '0' Hence fread does not work and prog

pointer jumps to file close.
code for decoder initialization is standard ITU code.
I am not getting where exactly i am wrong

plz help me
thanks in advance
Snehal
__________________________________





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Re: want help regarding memory map of 5416 - Jeff Brower - Aug 1 21:18:00 2003

Snehal Joshi-

> My Problem:
> Upto file opening there is no problem. But during this
> time value of cpl = 1 i.e. direct addressing
>
> mode using SP.
> but after decoder initialization value of cpl is
> changed to '0' Hence fread does not work and prog
>
> pointer jumps to file close.
> code for decoder initialization is standard ITU code.
> I am not getting where exactly i am wrong

Try:

main() {

Veriable declaration;
File opening;
decoder initialization;

/* restore CPL -- what's wrong with decoder init, anyway */

asm(" SSBX CPL");
asm(" NOP");
asm(" NOP");
asm(" NOP");

while(fread(data from input file) == frame_size) {
decode;
fwrite(write data to output file);
}

file close;
}

Jeff Brower
system engineer
Signalogic




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