Technical discussions about the TI C54x DSPs (including the c5401, c5402, c5402a, c5404, c5407, c5409, c5409a, c5410, c5410a, c5416, c5420, c5421, c5441, c549, c5470 and c5471).
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hello all i need some help on c5416 memory map. my cmd file look something like this. MEMORY { PAGE 0: /* program space */ DARAM0 (RWX) : o=000080h l=003f80h VECS0 (RWX) : o=007f80h l=000080h EXT (RWX) : o=008000h l=004000h ROM (R ) : o=00c000h l=003f00h RSV1 (R ) : o=00ff00h l=000080h VECS1 (RWX) : o=00ff80h l=000080h SARAM03 (RWX) : o=028000h l=008000h SARAM47 (RWX) : o=038000h l=008000h PAGE 1: /* Data Space */ DARAM2 (RWX) : o=004000h l=003f80h DARAM47 (RWX) : o=008000h l=008000h } SECTIONS { .intvecs : > VECS0 PAGE 0 .text : > SARAM47 PAGE 0 .cinit : > SARAM47 PAGE 0 .pinit : > SARAM47 PAGE 0 .switch : > SARAM47 PAGE 0 .sysmem : > DARAM47 PAGE 1 .stack : > DARAM47 PAGE 1 .const : > DARAM47 PAGE 1 .cio : > DARAM47 PAGE 1 .bss : > DARAM47 PAGE 1 .data : > DARAM47 PAGE 1 } 1) In c5416 we have 128 pages each of size 64k (program space),how will i address SARAM03,SARAM47.if i do as shown above, CCS will give an error. if i use page0 program & data memory than there is no problem. 2) i set PMST in GEL file to 0x2c...Even, i used DSP/BIOS too for placing the compiler sections...there also it's giving the same error. 3) since there are 23 address lines, i can address upto 8M words, if so, what modifications must be done in my CMD file. 4) since XPC register determines the page no,how can i set xpc reg to point to two different pages @ the same time. Thanks in advance -Lakshman __________________________________ |