Technical discussions about the TI C54x DSPs (including the c5401, c5402, c5402a, c5404, c5407, c5409, c5409a, c5410, c5410a, c5416, c5420, c5421, c5441, c549, c5470 and c5471).
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Hi everyone, I am having a strange behavior when running my board with boot via parallel bus. The programm is completely loaded and running properly, but the CLKOUT signal is 4 times lower than expected. It was expected 117.6MHz, but there is 29.4MHz. Note 1: I am using the two internal DSP5407 timers, and they are generating interruptions as if the clock was 117.6MHz! Note 2: when debugging with my PC and JTAG interface, CLKOUT runs at 117.6MHz. So the problem is only when booting from external memory. Any information will be very valuable. Thank you very much, Believer |
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Fixed. Bits 13 and 14 of BSCR, on the 5407, sets a CLK divider to put on the CLKOUT pin. Properly setting both bits to 0 resulted on CLKOUT having the expected frequency. Thanks, Believer --- In , "the_believer_1976" <the_believer_1976@y...> wrote: > Hi everyone, > > I am having a strange behavior when running my board with > boot via parallel bus. > > The programm is completely loaded and running properly, but the > CLKOUT signal is 4 times lower than expected. It was expected > 117.6MHz, but there is 29.4MHz. > > Note 1: I am using the two internal DSP5407 timers, and they are > generating interruptions as if the clock was 117.6MHz! > > Note 2: when debugging with my PC and JTAG interface, CLKOUT runs > at 117.6MHz. So the problem is only when booting from external memory. > Any information will be very valuable. > > Thank you very much, > Believer |