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Discussion Groups | TMS320C54x | 5402 clock stop mode

Technical discussions about the TI C54x DSPs (including the c5401, c5402, c5402a, c5404, c5407, c5409, c5409a, c5410, c5410a, c5416, c5420, c5421, c5441, c549, c5470 and c5471).

  

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runing c & assembly combined - prasanth rajagopal - Sep 17 9:57:00 2005



hi
  I want to call a simple c program from an assemly program. the inputs are just integers and an array..now how do i give the inputs before calling it? do i need to see the .S file and understand which registers these inputs are? please give me an idea....
 
thanking u,
with regards,
prasanth.



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5402 clock stop mode - gl4c...@yahoo.com - Sep 20 11:09:00 2005

I'm working on 5402 and i used McBSP port zero
in clock stop mode as follows:

- CLKR generated internally (by Sample Rate Generator)
and provided to external device (ADC)
- FSR generated externally and provided to McBSP port

i'd like to know if the clock must be still running
even if i have already gotten the serial word.
In other words: how can i program the port so
that the clock CLKR is provided externally only
during frame receiving and not always?

Gl.





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Re: 5402 clock stop mode - ajit...@SoftHome.net - Sep 21 0:10:00 2005

Hi,
For McBSP, usually the clock will always be running even when you are not
receiving/transmitting any data. But it seems your ADC interface is an SPI,
and hence you need the clock only during data transfer. Then you need to
configure the McBSP for SPI mode (or clock stop mode, described in detail in
TI docs... i am only sure of C55x docs).
Cheers,
Ajith.

gl4com@gl4c... writes:

> I'm working on 5402 and i used McBSP port zero
> in clock stop mode as follows:
>
> - CLKR generated internally (by Sample Rate Generator)
> and provided to external device (ADC)
> - FSR generated externally and provided to McBSP port
>
> i'd like to know if the clock must be still running
> even if i have already gotten the serial word.
> In other words: how can i program the port so
> that the clock CLKR is provided externally only
> during frame receiving and not always?
>
> Gl. >





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Re: Re: 5402 clock stop mode - pravin patil - Sep 21 9:38:00 2005

Hi,
If u r giving clock to the codec,(as u had said "CLKR generated internally (by Sample Rate Generator and provided to external device (ADC)") in that case u must be running the clock contineously, since the frame sync from the codec will be derived from the master clock signal of the codec, Ex. if u take the case of TLC320AD50, the frame sync will be fs=MCLK/128*N....refer datasheet...In ur case i think(hope) your connections are as follows
BCLKR0==>MCLK of codec
Regards,
Pravin.

a...@SoftHome.net wrote:
Hi,
For McBSP, usually the clock will always be running even when you are not
receiving/transmitting any data. But it seems your ADC interface is an SPI,
and hence you need the clock only during data transfer. Then you need to
configure the McBSP for SPI mode (or clock stop mode, described in detail in
TI docs... i am only sure of C55x docs).
Cheers,
Ajith.

g...@yahoo.com writes:

> I'm working on 5402 and i used McBSP port zero
> in clock stop mode as follows:
>
> - CLKR generated internally (by Sample Rate Generator)
> and provided to external device (ADC)
> - FSR generated externally and provided to McBSP port
>
> i'd like to know if the clock must be still running
> even if i have already gotten the serial word.
> In other words: how can i program the port so
> that the clock CLKR is provided externally only
> during frame receiving and not always?
>
> Gl.>

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