Technical discussions about the TI C54x DSPs (including the c5401, c5402, c5402a, c5404, c5407, c5409, c5409a, c5410, c5410a, c5416, c5420, c5421, c5441, c549, c5470 and c5471).
Megha-
> I did following:
>
> int rx_wait[8];
> int tx_wait[8];
>
> for(i=0;i<8;i++)
> {
> rx_wait[i] = 0;
>
> /* Copy data from microphone inputs to headphone output */
> while (!PEP5416_AIC23_read16(hCodec, &buffer[i])) rx_wait[i]++;
> printf("rx wait is %d \n",rx_wait[i]);
>
> tx_wait[i] = 0;
> while (!PEP5416_AIC23_write16(hCodec, buffer[i])) tx_wait[i]++;
> printf("tx wait is %d \n",tx_wait[i]);
> }
Don't put printf() statements in the loop -- that's a no-no for real-time operation
and accurate measurement. Run the experiment again and tell me what are your
xx_wait[] values. Just use memory watch window to learn the array values after the
loop is finished -- no need for printf().
Regarding CLKMD value below, if CLKIN is 12 MHz and multiplier is 8, then the 5416
should be running 96 MHz. You can try multiplier of 13 also, which would be 156 MHz
(chip limit is 160).
-Jeff
> The values i got was
> rx wait is 13
> tx wait is 0
> rx wait is 0
> tx wait is 0
> rx wait is 0
> tx wait is 0
> rx wait is 0
> tx wait is 0
> rx wait is 0
> tx wait is 0
> rx wait is 0
> tx wait is 0
> rx wait is 0
> tx wait is 0
> rx wait is 0
> tx wait is 0
> I tested with 10, 20 instead of 8. Sometimes rx was 13 twice but rest all was same.
>
> In DSP/BIOS I have set CLKOUT as 96MHz, CLKMD value is 7107 (multiply by 8).
> In the master mode, the TLV320AIC23 clock and sampling rates are derived from a
> 12-MHz MCLK signal.
> In the PEP config (PEP5416_AIC23_Config config) I have set CLKOUT as 12MHz (and
> 6MHz) and CLKIN as 12MHz. These values can be either set to 12 or 6MHz. In this
> config, base oversampling rate is set as 250fs and thats 48KHz.
> Maximum sampling rate can be 48KHz with filter type as 0 and 96KHz with filter type
> as 3.
> Kindly reply
> Thanks
> Megha
>