JTAG emulator question | TMS320C54x

Technical discussions about the TI C54x DSPs (including the c5401, c5402, c5402a, c5404, c5407, c5409, c5409a, c5410, c5410a, c5416, c5420, c5421, c5441, c549, c5470 and c5471).

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Hi,

I have a two-processor dev board which I am debugging through an XDS510PP Plus JTAG emulator pod. I have designed my interface hardware exactly as on page B-13 of the C54x Reference set, vol. 1. It is sometimes possible to debug the two 'C5402s successfully, but I am regularly getting errors, due to the processor timing out. This mainly seems to be a result of using breakpoints, and single stepping. It also has difficulty halting the processor. I am therefore assuming that the problem lies with the EMU0/1 signals. These problems mainly occur with the 1st device in the scan chain. Has anyone had any experience with multi-processor debugging...can you recommend a particular logic buffer? I am a bit worried that mine may be too slow.

Thanks in advance,

Tim Shearer

Digital Design Engineer
BBM Electronics Group, Trantec Systems
E-Mail: t...@trantec.co.uk, Web: www.trantec.co.uk
Phone: +44 (0)20 8330 3388, Fax: +44 (0)20 8330 3222

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JTAG emulator question - Tim Shearer - Jan 22 10:40:00 2001