C542x familly | TMS320C54x

Technical discussions about the TI C54x DSPs (including the c5401, c5402, c5402a, c5404, c5407, c5409, c5409a, c5410, c5410a, c5416, c5420, c5421, c5441, c549, c5470 and c5471).

Post a new Thread

Hi Everyone. I have severals questions about how peoples are using the C542x familly, from a software stand point. I am desining a chip, right now and feedback from you guys are important, because eventually, I am sure, you will deal with it. I am trying to make it "software friendly" :-))) 1) Did somebody is using the EMIF interface with the C5420 or C5421 DSPs or most of you are using the HPI port (it's a hardware question, I know but I need to ask). Is the internal memory is big enough to store all your codes. 2) If the answer of the question 1) is yes, because the port is shared by the HPI and the EMIF, how the external world (CPU) knows when the interface is setup to the HPI port (C5420) ??? 3) Do you need a separate reset signal for each core, or 1 per DSP is sufficient for your application. ( I heard about a core reset problem. Is it true ??) 4) Do you like to use interrupt to transfer data out from the DSP or polling from the CPU is OK with you. 5) When the CPU send data to the DSP memory, is it make sense to assume that the data is store only in a continuous address memory mapping. 6) Same when the CPU is reading data from the memory. Do you store data in a continuous location or you are partionning the data in a different memory location. Thanks for your feedback, Bruno Latulippe Senior ASIC Engineer Tundra Semiconductor

(You need to be a member of c54x -- send a blank email to c54x-subscribe@yahoogroups.com )

Sign in

Search c54x

Subscribe to c54x

c54x by Keywords

Discussion Groups

See Also

Discussion Groups | TMS320C54x | C542x familly

C542x familly - Author Unknown - Sep 28 1:11:00 1999