Sign in
Search c54x
Subscribe to c54x
c54x by Keywords
5409 | 5416 | AD5 | ADC | BIOS | Boot | Booting | Bootloader | C540 | C5402 | C5409 | C5416 | CCS | Codec | DMA | Dmad | DSK | DSKPlus | Dsplib | EVM | FFT | FIR | Flash | GPIO | HPI | Initialization | Interrupt | JTAG | LOG_printf | MCBSP | RFFT | RTDX | Sampling | STLM | UART | VC540
Discussion Groups
Discussion Groups | TMS320C54x | latency between STLM and MVDK
Technical discussions about the TI C54x DSPs (including the c5401, c5402, c5402a, c5404, c5407, c5409, c5409a, c5410, c5410a, c5416, c5420, c5421, c5441, c549, c5470 and c5471).
latency between STLM and MVDK - brcn2 - Feb 4 13:29:00 2002
|
Hi all, The Cpu&Peripherals book says that there are some restricitons using STLM when writing to an AR. One of these is that* "the next instruction must write to any ARx..." Then why do I have STLM A, AR2 MVDK *sp(db),AR4 in almost all of my working asm programs. The answer: Because I learned this from dsplib and also that nothing went wrong..until now, where I have a program which crashes(never halts and finally freezes the Code Composer ) if I don't put two NOPs in between these commands. Any comments? *page 7-36, table 7-3, category 2 Burcin Bektas DSP Software Engineer METU/TUBITAK |
(You need to be a member of c54x -- send a blank email to c54x-subscribe@yahoogroups.com )
Re: Latency between STLM and MVDK - George Crouse - Feb 5 17:14:00 2002
|
It also depends upon the third instruction following these; check out example 7-27. The write to AR2 in your first instruction causes a conflict so the DSP delays the update of AR4 in your second intruction to allow the first to complete. If the next instruction uses AR4 it will be wrong and possibly go off in the weeds somewhere. Inserting 2 NOPs between 1/2 works, as does 1 NOP between 2/3. It does help that your indirect-offset addressing adds a cycle, but it really depends what that third instruction is; sometimes it will work fine- sometimes not. I've been bit by these until I learned to turn on the "Warn on Pipeline Conflicts" setting in code composer. I figured CC was inserting the required NOPs and just warning me so I could rearrange the code myself. It would be so easy (albeit inefficient) for the assembler to fix this as it already detected the conflicts; it never occurred to me it would generate disfunctional code! > Date: Mon, 04 Feb 2002 13:29:23 -0000 > From: "brcn2" <> > Subject: latency between STLM and MVDK > > Hi all, > > The Cpu&Peripherals book says that there are some restricitons using > STLM when writing to an AR. One of these is that* > "the next instruction must write to any ARx..." > > Then why do I have > > STLM A, AR2 > MVDK *sp(db),AR4 > > in almost all of my working asm programs. > The answer: Because I learned this from dsplib and also that nothing > went wrong..until now, where I have a program which crashes(never > halts and finally freezes the Code Composer ) if I don't put two NOPs > in between these commands. > > Any comments? > > *page 7-36, table 7-3, category 2 > > Burcin Bektas > DSP Software Engineer > METU/TUBITAK |
(You need to be a member of c54x -- send a blank email to c54x-subscribe@yahoogroups.com )