Hi All,

I'm using a DMA channel to read data from a device and write it to 
internal RAM on the DSP.

This DMA Channel uses INT3 as its synchronisation event, and uses 
Frame synchronisation.

I have a problem, in that the signal that drives INT3 is running 
quicker than what the DMA channel can actually write frames i.e. 
during the transfer of one frame, the sync event for the next frame 
occurrs.

Unfortunately the c5510 doesn't queue SYNC events (a real shame), 
but does offer the ability to track missing SYNC events by using the 
DROPIE/DROP bits to  generate an interrupt.

Does anyone have any suggestions for handling this DROP event, as it 
could feasibly happen on numerous occasions during my DMA block 
transfer.

Also, it would appear that when the DROP event occurrs, the DMA 
Controller automatically disables the current channel. Can anyone 
confirm this ?

If it does disable it then, when I re-enable the channel will it 
continue from where it left off, or will it download whatever values 
currently reside in the DMA registers for that channel. I strongly 
suspect its the later, but would like some confirmation of this.

As always, any information you can provide will be greatly 
appreciated.

Cheers,

Scotty