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Discussion Groups | TMS320C55x | Re: porting C54x assembly code to C55x - specific application

Technical discussions about the TI C55x DSPs (including the c5501, c5502, c5503, c5507, c5509, c5510 and OMAP5910).

  

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Re: porting C54x assembly code to C55x - specific application - the_...@hotmail.com - Aug 10 8:57:04 2006



Jeff,

Thank you for your reply. I do apologize for not sending the email with my real name! That
silly reap thing stuck since I set my hotmail addy with outlook ages ago.

John Dixon, at your service :)

Thanks for clarifying that section. After more inspection of the previous application, I have
found the following:

* CPL bit set to 1, i.e. offset 0 using stack pointer.
* The daughterboard is connected to the DSK board in three places: the external memory
expansion interface, the peripheral interface (i.e. the two daughterboard connectors), and also
via soldered-on coaxial cable-core to U30 (5th pin from top, right hand side). 

I can't find a datasheet or schematic that would explain what U30 is, and TI.com deems the
whole package obsolete and no links to its technical documents are on the product page. Any
idea what U30 is? The logical thing would be that it's a memory chip (ext sram), hence the
allocation of address 0x8000 on EXTRAM, as mentioned in previous message?

* the daughter board is acting as a DAC, supporting higher analog output than the onboard codec
(looking for 100+ Msps). The idea is to tap into U30's line and obtain the signal, perform the
DAC operation on the daughterboard.

what i'm wondering is, the last while(1) loop just moves the data from 8006h to the stack
pointer.. would 8006h contain a full 511x4 long sequence and send it to stack, and the pin at
U30 pick it up, send it to daughterboard?

please excuse any ignorance i might utter, I'm learning this DSP architecture as I go on.

Any ideas would be hugely appreciated.
-- John

The Reap-
>
>>  ... so in the last while loop, what does the MVKD command do
>>  (I can't find MVKD in the C55xx help, so Im guessing its no longer
>>  used) to the data in 8006h, and what is '0' ?
>
>  asm ("  MVKD 8006h, 0");
>
>This instruction -- for reasons not apparent in your code comments -- is
>moving data from 0x8006 in memory to another memory location, which is
>either:
>
>  a) offset 0 using current DP register x 128 as base (i.e.
>     DP*128 + offset)
>
>  b) offset 0 using current stack pointer as base (i.e.
>     SP + offset)
>
>which one depends on the current CPL bit setting in C54xx ST1 register.
>
>-Jeff
>
>PS.  Sounds to me like you're a relatively new engineer, a bright one, and
>off to a good start.  I suggest using your real name to post, which is a
>professional thing to do on a group frequented by many professional
>engineers.  It shows respect and will gain you respect.
>
>>  Hello. I am porting an application code from a TMS320C5402 DSK to a
>>  TMS320C5510 DSK. The operation of the code is as follows:
>> 
>>  1) generate a 511-chip maximal length sequence (taps at 1st, 4th, and 9th
>>  bits)
>> 
>>  2) perform gaussian pulse shaping on it
>>  3) obtain 4 samples per chip
>>  4) send resultant sequence repeatedly to a DAC board connected to the
>>  external memory interface (total = 511x4 = 2044 bits long)
>> 
>>  the 5402 code compiles with only 2 errors, which I'm sure are due to the
>>  architectural/instruction set differences. Now I've never worked with a
>>  5402 and as a matter of fact this is my first endevour working with DSP
>>  hardware at all.
>> 
>>  The errors/remarks I get are:
>> 
>>  ------------------------------------------------------------------
>> 
>>   [E0003]
>>           This address mode is invalid in CPL=1 mode
>>  		MOV  *CDP, @#0; port of MVKD 8006h, 0
>>  -------------------------
>> 
>>  REMARK   at line 361:
>>   [R5010]
>>  C54x and C55x interrupt enable/flag registers and bit mapping are
>>  different.  Replace with native C55x mnemonic.
>>  MVKD 8006h, 0
>> 
>>  -------------------------------------------------------------------
>>  THE FULL CODE FOLLOWS:
>> 
>>  /*****************************************************************************/
>>  /* MAIN
>>    */
>>  /*****************************************************************************/
>> 
>>  void main()
>>  {
>> 
>>      int n=0,m=0,p=0;
>>  	brd_init(100);
>> 
>>  	brd_set_wait_states(0, 0, 0);
>> 
>>  	asm("	STM 0100h, AR4");   /* Store immediate value (100h) into AR4 */
>>  	asm("	STM 0200h, AR5");
>>  	asm("	STM 0300h, AR6");
>>  	asm("	STM 0400h, AR7");
>>  	asm("	STM 800Ah, AR3");
>>  	asm("	ST #00FFh, *AR4"); /* Pre-load SR value into AR4*/
>>  	asm("	ST #00h, *(0101h)"); /* Stores the contents of immediate val
>>  indirectly into 16bit mem. */
>>  	asm("	ST #00h, *(0102h)");
>>  	asm("	ST #00h, *(0103h)");
>>  	asm("	ST #00h, *(0104h)");
>>  	asm("	ST #00h, *(0105h)");
>>  	asm("	ST #00h, *(8000h)");
>>  	for(m=0;m   	{
>> 
>>  	for(n=0;n   	{
>>  		asm("	MVDD *AR4, *AR5");  /* Put contents of location addressed by AR4
>>  into location addressed by AR5 and incr both regs. */
>>  		asm("	ANDM #01h, *AR5");  /* get LSB for O/P*/
>>  		asm("	LD *AR4, B");     /* Load B with contents of addr held in AR4 */
>>  		asm("	SFTL B, -5, B");  /* shift right 5 the contents of accm B */
>>  		asm("	LD *AR4, A");     /* Load A with contents of addr held in AR4 */
>>  		asm("	XOR A, B");        /* XOR of A and B result in B */
>>  		asm("	AND #01h, B, A");  /* AND 1 and B result into A (?) Mask LSB*/
>>  		asm("	SFTL A, 8, A");    /* Shift contents of accum A left 8 bits. */
>>  		asm("	LD *AR4, B");      /* Load B with contents of addr held in AR4 */
>>  		asm("	SFTL B, -1, B");   /* Shift contents of accum B right 1 bits. */
>>  		asm("	OR A, B");         /* OR A and B result in B */
>>  		asm("	STL B, *AR4");     /* Store Accum B low into mem */
>>  		for(p=0;p   per chip. */
>>  		{
>>  			asm("	LD *AR5, A");
>>  			asm("	MVKD 0104h, *AR6");
>>  			asm("	MVDK *AR6, 0105h");
>>  			asm("	MVKD 0103h, *AR6");
>>  			asm("	MVDK *AR6, 0104h");
>>  			asm("	MVKD 0102h, *AR6");
>>  			asm("	MVDK *AR6, 0103h");
>>  			asm("	MVKD 0101h, *AR6");
>>  			asm("	MVDK *AR6, 0102h");
>>  			asm("	STL A, *(0101h)");
>> 
>>  			asm("	LD #07Fh, A");     /*Max/Mid Value*/
>>  			asm("	MAC *(0105h), #00h, A");
>>  			asm("	ST #002h, *(0111h)");
>>  			asm("	MAC *(0104h), #00h, A");
>>  			asm("	ST #007h, *(0112h)");
>>  			asm("	MAC *(0103h), #00h, A");
>>  			asm("	ST #016h, *(0113h)");
>>  			asm("	MAC *(0102h), #00h, A");
>>  			asm("	ST #02Bh, *(0114h)");
>>  			asm("	MAC *(0101h), #7Fh, A");
>>  			asm("	ST #035h, *(0115h)");
>> 
>>  			asm("	LD #01h, B");
>>  			asm("	LD *(0111h), T");
>>  			asm("	XOR *(0105h), B");
>>  			asm("	STL B, *(0106h)");
>>  			asm("	MAS *(0106h), A");
>>  			asm("	LD #01h, B");
>>  			asm("	LD *(0112h), T");
>>  			asm("	XOR *(0104h), B");
>>  			asm("	STL B, *(0106h)");
>>  			asm("	MAS *(0106h), A");
>>  			asm("	LD #01h, B");
>>  			asm("	LD *(0113h), T");
>>  			asm("	XOR *(0103h), B");
>>  			asm("	STL B, *(0106h)");
>>  			asm("	MAS *(0106h), A");
>>  			asm("	LD #01h, B");
>>  			asm("	LD *(0114h), T");
>>  			asm("	XOR *(0102h), B");
>>  			asm("	STL B, *(0106h)");
>>  			asm("	MAS *(0106h), A");
>>  			asm("	LD #01h, B");
>>  			asm("	LD *(0115h), T");
>>  			asm("	XOR *(0101h), B");
>>  			asm("	STL B, *(0106h)");
>>  			asm("	MAS *(0106h), A");
>>  			asm("	STL A, *(0107h)");
>> 
>>  			asm("	STL A, *AR6");
>>  			asm("	STL A, *AR7");
>>  			asm("	ANDM #0AAh, *AR6");
>>  			asm("	ANDM #055h, *AR7");
>>  			asm("	LD *AR7, A");
>>  			asm("	ROL A");
>>  			asm("	LD *AR6, B");
>>  			asm("	ROR B");
>>  			asm("	ADD B, A");
>>  			asm("	STL A, *AR3+");
>>  		}
>> 
>>  	}
>>  	}
>>  	while(1)
>>  	{
>>  		asm("CHIMP	RPT #2036;");/* Repeat #2037 times;  */
>>  		asm("	MVKD 8006h, 0");                /* Do it once more without
>>  incrementing the source addr */
>>  		asm("	MVKD 8006h, 0");                /* Do it once more without
>>  incrementing the source addr */
>>  		asm("	B CHIMP");
>>  	}
>>  }
>> 
>>  ========================================================================
>> 
>>  Now, the errors I'm getting are in the while(1) loop in the end.
>> 
>>  from the linker/memory map of the 5402 project, I noticed this:
>>   EXTRAM  ( RWI )  :  o = 0x8000,  l = 0x8000  /* external SRAM */
>> 
>>  This, as far as I understand, means that data allocated to EXTRAM starts
>>  from address 0x8000 for a length of 0x8000.
>> 
>>  Correct? so in the last while loop, what does the MVKD command do (I can't
>>  find MVKD in the C55xx help, so Im guessing its no longer used) to the
>>  data in 8006h, and what is '0' ?
>> 
>>  I'd appreciate ANY help on this, as I'm really stuck on this.. i was never
>>  skilled in assembly *shrug*



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