How do I get rid of the following warning:

>> warning: .hwi_disp_sec section (0x1fff8) spans page boundary: not allowed
            before CPU revision 3.0

The code is compile in large memory model (must) using the DSP//BIOS.
If it is a proper solution how can the automatically generated cmd file be overriden to include
a block eg.
 
   .hwi_disp_sec: block(0x20000) {} > SDRAM

instead of the automatically generated:

   .hwi_disp_sec: {} > SDRAM

Thanks,

Daniel

Daniel-

> How do I get rid of the following warning:
> 
> >> warning: .hwi_disp_sec section (0x1fff8) spans page boundary: not allowed
>             before CPU revision 3.0

If this is CCS v3.1 or higher, try entering in "Custom Target" field (contained in
Project | Build Options | Compiler | Basic dialog tab):

  55xx:3.0

where 55xx is whatever device you're using (5510, 5502, etc).  For more information
on this, see the -v command in cl55.exe command-line options.  Of course this assume
your silicon really is revision 3.0 or higher, and I think for some 55xx devices TI
does not have out yet 3.0 silicon.

> The code is compile in large memory model (must) using the DSP//BIOS.
> If it is a proper solution how can the automatically generated cmd file be overriden to
include a block eg.
> 
>    .hwi_disp_sec: block(0x20000) {} > SDRAM
> 
> instead of the automatically generated:
> 
>    .hwi_disp_sec: {} > SDRAM

This is all Hardware Interrupt Dispatch code?  If so, why is it so large?  Shouldn't
you move some of that code to user tasks?

-Jeff

C5502, the DUT, doesn't have revision 3 supported yet.
The dispatch code does NOT have to be that large, the block was just to re-align the
automatically generated code.  Were it code I wrote I could simply use the align prama, but not
in this case.  I have CCS rev. 3.1.23, but I'm starting to think the BIOS revision may be at
issue here.  I have revision 4.90.  I will attempt to upgrade the BIOS and see if this solves
anything.  I'm somewhat confused though about the page alignment. I thought the 55xx memory was
linear and not page bound?  Does the code have to be 64k bound???

Thanks,

Daniel
Daniel-
>
>>  How do I get rid of the following warning:
>>  
>>  > >  warning: .hwi_disp_sec section (0x1fff8) spans page boundary: not allowed
>>              before CPU revision 3.0
>
>If this is CCS v3.1 or higher, try entering in "Custom Target" field (contained
in
>Project | Build Options | Compiler | Basic dialog tab):
>
>  55xx:3.0
>
>where 55xx is whatever device you're using (5510, 5502, etc).  For more information
>on this, see the -v command in cl55.exe command-line options.  Of course this assume
>your silicon really is revision 3.0 or higher, and I think for some 55xx devices TI
>does not have out yet 3.0 silicon.
>
>>  The code is compile in large memory model (must) using the DSP//BIOS.
>>  If it is a proper solution how can the automatically generated cmd file be overriden
to include a block eg.
>>  
>>     .hwi_disp_sec: block(0x20000) {} >  SDRAM
>>  
>>  instead of the automatically generated:
>>  
>>     .hwi_disp_sec: {} >  SDRAM
>
>This is all Hardware Interrupt Dispatch code?  If so, why is it so large?  Shouldn't
>you move some of that code to user tasks?
>
>-Jeff

Daniel-

> C5502, the DUT, doesn't have revision 3 supported yet.
> The dispatch code does NOT have to be that large, the block was just to
> re-align the automatically generated code.  Were it code I wrote I could
> simply use the align prama, but not in this case.  I have CCS rev. 3.1.23,
> but I'm starting to think the BIOS revision may be at issue here.  I have
> revision 4.90.  I will attempt to upgrade the BIOS and see if this solves
> anything.  I'm somewhat confused though about the page alignment. I
> thought the 55xx memory was linear and not page bound?  Does the code
> have to be 64k bound???

If you're using 5502 then yes I think any one code segment has to be within 64k, due
to the Rev 3 silicon issue.  You can branch/call to other segments.  A current
revision 5509A or 5510 wouldn't have this issue.

-Jeff

> Daniel-
> >
> >>  How do I get rid of the following warning:
> >>
> >>  > >  warning: .hwi_disp_sec section (0x1fff8) spans page boundary: not
allowed
> >>              before CPU revision 3.0
> >
> >If this is CCS v3.1 or higher, try entering in "Custom Target" field
(contained in
> >Project | Build Options | Compiler | Basic dialog tab):
> >
> >  55xx:3.0
> >
> >where 55xx is whatever device you're using (5510, 5502, etc).  For more information
> >on this, see the -v command in cl55.exe command-line options.  Of course this assume
> >your silicon really is revision 3.0 or higher, and I think for some 55xx devices TI
> >does not have out yet 3.0 silicon.
> >
> >>  The code is compile in large memory model (must) using the DSP//BIOS.
> >>  If it is a proper solution how can the automatically generated cmd file be
overriden to include a block eg.
> >>
> >>     .hwi_disp_sec: block(0x20000) {} >  SDRAM
> >>
> >>  instead of the automatically generated:
> >>
> >>     .hwi_disp_sec: {} >  SDRAM
> >
> >This is all Hardware Interrupt Dispatch code?  If so, why is it so large?  Shouldn't
> >you move some of that code to user tasks?
> >
> >-Jeff