Technical discussions about the TI C55x DSPs (including the c5501, c5502, c5503, c5507, c5509, c5510 and OMAP5910).
Dear list, I am in the process of upgrading of our hardware design. To reduce cost, I plan to use SPI flash instead of the original parallel flash. The system will load boot table from flash, and occasionally write 512 bytes to flash during operating. SPRA375E suggests to connect IO4 to CSn of the flash for bootloader, while SPRA487C suggests connecting FSX to CSn for normal read and write. I thought about connecting IO4 only and using IO4 to emulate FSX, but it's impossible to meet the time sequency of FSX since we have only loose control on IO pins. Option 1, I can use some 2 to 1 switch. Option 2, I guess we might also try to connect both IO4 and FSX to CSn, since FSX is configured as input after reset and I can configure IO4 as high-impedance after boot loader. IO4 and FSX won't interfere each other in this way. I appreciate any input. Wei