Patki-

> I am working on tms320c5509a. In BGA package it is having 21 address lines
> with 4 CE for external/internal memory.
> 
> Thus if I interface the external memory to the processor I will interface
> address lines and one of the CE to it.
> 
> In the datasheet of tms320c5509a, page-35 the memory map is given. There it
> is mentioned the address space from 000000 to FFFFFF, which needs the
> address  line 24 bit wide while processor is having 21 address lines.
> So how to give the address with only 21 bit address line?

I believe that for 550x, Flash ext mem capacity is limited to a 1 Mbyte addr range
(16-bit wide), and SRAM ext mem is limited to a 2 Mbyte add range (32-bit wide, using
EMIF byte-enable outputs).  SDRAM capacity is higher because the 550x uses some addr
lines for bank-select and again uses byte-enables.  The TMS320VC5501/5502 DSP
External Memory Interface (EMIF) Reference Guide document:

  http://focus.ti.com/lit/ug/spru621f/spru621f.pdf

shows up to 64 Mbyte SDRAM space for C5502.

-Jeff
Check Out Industry's First Single-Chip, Multi-Format, Real-Time HD Video Transcoding Solution
for Commercial & Consumer End Equipment: www.ti.com/dm6467