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Brian,

The AIC23 generates one framesync every sample (16-bit left channel
followed by 16-bit right channel) to Tx data. And also expects the same on
Rx.
Kindly refer the datasheet for the AIC23 codec.
The codec is in Master mode, and so it only generates the Frame Sync pulse
for Tx and Rx.

Regards,
Aditi.

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On Sep 14, 2010, at 15:14, Aditi Akula wrote:
> The AIC23 generates one framesync every sample (16-bit left channel
> followed by 16-bit right channel) to Tx data. And also expects the  
> same on
> Rx.
> Kindly refer the datasheet for the AIC23 codec.
> The codec is in Master mode, and so it only generates the Frame  
> Sync pulse
> for Tx and Rx.
>

Sounds like you're doing the right thing to deal with 32-bit data.   
Sorry, but I did not have time to reference the data sheet.

Are you using the Chip Support Library to initialize the McBSP?

Are you using the SPI mode for the McBSP?

What are all of the register settings for the McBSP?

I have found that it's fairly easy to get the settings slightly wrong  
and then things do not work.  If you have a logic analyzer, then that  
might help to get a picture of the bit format as it comes and goes.

Brian Willoughby

Sound Consulting

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A thought:
Have you configured your McBSP to handle two framesyncs or just one? If the
codec sends one FS per sample, your McBSP needs to handle both syncs. Could
it be that it handles one, because of the 32-bit configuration?

HTH.
-Sima

On Wed, Sep 15, 2010 at 12:14 AM, Aditi Akula <a...@signalogic.com>
wrote:

> Brian,
>
> The AIC23 generates one framesync every sample (16-bit left channel
> followed by 16-bit right channel) to Tx data. And also expects the same on
> Rx.
> Kindly refer the datasheet for the AIC23 codec.
> The codec is in Master mode, and so it only generates the Frame Sync pulse
> for Tx and Rx.
>
> Regards,
> Aditi.
>  
>

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