Technical discussions about the TI C55x DSPs (including the c5501, c5502, c5503, c5507, c5509, c5510 and OMAP5910).
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hello, we plan to use OMAP5910. looking at the EMIFS timing diagrams, I conclude that during an asynchronous read, it might happen that address lines and byte enable signals change before the OE goes high. in this case the processor would read an undesired memory (flash) location.. is this issue known? how can I avoid this? or where can I find a reference design for OMAP5910? ok.. we could buy the Innovator EVM, but before we buy that board, we would like to know if we can use this chip :) regards, Willy email: w dot backhaus at newage-avkseg dot com |
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Check out the OSK5912 for $299, info available at: http://www.spectrumdigital.com/cgi/catalog.cgi?show_product=701875 regards, Thom -----Original Message----- From: Backhaus Willy [mailto:] Sent: Wednesday, July 07, 2004 12:27 AM To: Subject: [c55x] looking for a reference design for OMAP5910 (EMIFS read timings) hello, we plan to use OMAP5910. looking at the EMIFS timing diagrams, I conclude that during an asynchronous read, it might happen that address lines and byte enable signals change before the OE goes high. in this case the processor would read an undesired memory (flash) location.. is this issue known? how can I avoid this? or where can I find a reference design for OMAP5910? ok.. we could buy the Innovator EVM, but before we buy that board, we would like to know if we can use this chip :) regards, Willy email: w dot backhaus at newage-avkseg dot com _____________________________________ Yahoo! Groups Links |