Anyone have any experience or comments on putting the C5509A into the lowest power sleep mode. The low power sleep mode stops the external crystal oscillator...
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Anyone have any experience or comments on putting the C5509A into the lowest power sleep mode. The low power sleep mode stops the external crystal oscillator. You wake again with an external hardware interrupt (IRQ type thing) or RTC alarm. I've had a very difficult time getting it into this sleep mode and stopping the clock. Wake up is no problem. I've read all the app notes many, many times on setting everything correctly (USB to DPLL mode, stopping domains, etc.) before entering last idle state. Any hints? Thanks |
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MGray, try with this code example: *(ioport volatile unsigned int *)0x6c00 = 0x8000; // Clockout disable in External Bus Selection Register *(ioport volatile unsigned int *)0x1e00 = 0x200; // set USB PLL to x4 in USB PLL register *(ioport volatile unsigned int *)0x1e00 = 0x210; // set lock bit *(ioport volatile unsigned int *)0x7000 = 0x4; // activate USB (USB Reset = 1) in USB IDLE Control register *(ioport volatile unsigned int *)0x67FC |= 0x80; // pull DP high in USB CTL *(ioport volatile unsigned int *)0x7000 = 0x5; // activate USB and enable USB idle (USB Reset =1, USB Idle = 1) *(ioport volatile unsigned int *)0x6c00 = 0xc000; // Clockout & osc disable in External Bus Selection Register *(ioport volatile unsigned int *)0x3C09 = 0x1000; // IDLE IIC with ICMDR *(ioport volatile unsigned int *)0x2812 |=0x4000; // IDLE McBSP0 with PCR0 *(ioport volatile unsigned int *)0x2C12 |=0x4000; // IDLE McBSP1 with PCR1 *(ioport volatile unsigned int *)0x3012 |=0x4000; // IDLE McBSP2 with PCR2 *(ioport volatile unsigned int *)0x1002 |= 0x8000; // IDLE Timer0 with TCR0 *(ioport volatile unsigned int *)0x2402 |= 0x8000; // IDLE Timer1 with TCR1 *(ioport volatile unsigned int *)0x0001 = 0x2e; // enable EMIF, Peripheral, and DMA idle asm(" IDLE"); // delay of at least 2.5 us needed between the two IDLE instructions *(ioport volatile unsigned int *)0x0001 = 0x3F; // enable EMIF, Peripheral, DMA, CPU and Clock idle asm(" IDLE"); When in oscillator down mode, the interrupts are LEVEL triggered! Pay attention - the ~int lines must be in "hi"!! BR, Andrej Novak ----- Original Message ----- From: To: Sent: Monday, February 21, 2005 2:27 AM Subject: [c55x] C5509A Sleep Mode Anyone have any experience or comments on putting the C5509A into the lowest power sleep mode. The low power sleep mode stops the external crystal oscillator. You wake again with an external hardware interrupt (IRQ type thing) or RTC alarm. I've had a very difficult time getting it into this sleep mode and stopping the clock. Wake up is no problem. I've read all the app notes many, many times on setting everything correctly (USB to DPLL mode, stopping domains, etc.) before entering last idle state. Any hints? Thanks To |
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Andrej- This is clearly a reply based on experience and some hard debug work. Thank you. -Jeff Andrej Novak wrote: > > MGray, > > try with this code example: > > *(ioport volatile unsigned int *)0x6c00 = 0x8000; // Clockout disable > in External Bus Selection Register > *(ioport volatile unsigned int *)0x1e00 = 0x200; // set USB PLL to x4 > in USB PLL register > *(ioport volatile unsigned int *)0x1e00 = 0x210; // set lock bit > *(ioport volatile unsigned int *)0x7000 = 0x4; // activate USB (USB > Reset = 1) in USB IDLE Control register > *(ioport volatile unsigned int *)0x67FC |= 0x80; // pull DP high in > USB CTL > *(ioport volatile unsigned int *)0x7000 = 0x5; // activate USB and > enable USB idle (USB Reset =1, USB Idle = 1) > *(ioport volatile unsigned int *)0x6c00 = 0xc000; // Clockout & osc > disable in External Bus Selection Register > *(ioport volatile unsigned int *)0x3C09 = 0x1000; // IDLE IIC with > ICMDR > *(ioport volatile unsigned int *)0x2812 |=0x4000; // IDLE McBSP0 with > PCR0 > *(ioport volatile unsigned int *)0x2C12 |=0x4000; // IDLE McBSP1 with > PCR1 > *(ioport volatile unsigned int *)0x3012 |=0x4000; // IDLE McBSP2 with > PCR2 > *(ioport volatile unsigned int *)0x1002 |= 0x8000; // IDLE Timer0 with > TCR0 > *(ioport volatile unsigned int *)0x2402 |= 0x8000; // IDLE Timer1 with > TCR1 > *(ioport volatile unsigned int *)0x0001 = 0x2e; // enable EMIF, > Peripheral, and DMA idle > asm(" IDLE"); > // delay of at least 2.5 us needed between the two IDLE instructions > *(ioport volatile unsigned int *)0x0001 = 0x3F; // enable EMIF, > Peripheral, DMA, CPU and Clock idle > asm(" IDLE"); > > When in oscillator down mode, the interrupts are LEVEL triggered! Pay > attention - the ~int lines must be in "hi"!! > > BR, > Andrej Novak > > ----- Original Message ----- > From: > To: > Sent: Monday, February 21, 2005 2:27 AM > Subject: [c55x] C5509A Sleep Mode > > Anyone have any experience or comments on putting the C5509A into the > lowest power sleep mode. The low power sleep mode stops the external > crystal oscillator. You wake again with an external hardware interrupt > (IRQ type thing) or RTC alarm. I've had a very difficult time getting > it into this sleep mode and stopping the clock. Wake up is no problem. > > I've read all the app notes many, many times on setting everything > correctly (USB to DPLL mode, stopping domains, etc.) before entering last > idle state. > > Any hints? > > Thanks |
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This helped a lot. It is ALMOST working. If I call the TSK_sleep before I enter the power down mode, the clock does not stop. After I wake up from the RTC, I notice the IFR1 register is set to 0x0200. This bit corresponds to the DLOG interrupt. I've masked all interrupts before I went to low power mode. But it appears as though I'm still getting an interrupt that is preventing the clock from stopping. There is little information on the DLOG interrupt. It appears that many DSP/BIOS kernel events (such as though triggered by TSK_sleep) are logged to LOG_system. How can I disable this system event logging? I tried LOG_disable(&LOG_system), but that didn't work. If I have the DSP/BIOS | Message Log window open, the system sleeps correctly. I assume it is causing the JTAG emulator pod to correctly read and process the LOG_system messages. If I don't have an emulator, is there some set of pull up/downs on the JTAG pins to indicate a pod isn't present and to ignore all data log messages? Is there a document on the DLOG / BIOS interaction and operation? Thanks for the help --- In , "Andrej Novak" <andrej.novak@a...> wrote: > > MGray, > > try with this code example: > > *(ioport volatile unsigned int *)0x6c00 = 0x8000; // Clockout disable > in External Bus Selection Register > *(ioport volatile unsigned int *)0x1e00 = 0x200; // set USB PLL to x4 > in USB PLL register > *(ioport volatile unsigned int *)0x1e00 = 0x210; // set lock bit > *(ioport volatile unsigned int *)0x7000 = 0x4; // activate USB (USB > Reset = 1) in USB IDLE Control register > *(ioport volatile unsigned int *)0x67FC |= 0x80; // pull DP high in > USB CTL > *(ioport volatile unsigned int *)0x7000 = 0x5; // activate USB and > enable USB idle (USB Reset =1, USB Idle = 1) > *(ioport volatile unsigned int *)0x6c00 = 0xc000; // Clockout & osc > disable in External Bus Selection Register > *(ioport volatile unsigned int *)0x3C09 = 0x1000; // IDLE IIC with > ICMDR > *(ioport volatile unsigned int *)0x2812 |=0x4000; // IDLE McBSP0 with > PCR0 > *(ioport volatile unsigned int *)0x2C12 |=0x4000; // IDLE McBSP1 with > PCR1 > *(ioport volatile unsigned int *)0x3012 |=0x4000; // IDLE McBSP2 with > PCR2 > *(ioport volatile unsigned int *)0x1002 |= 0x8000; // IDLE Timer0 with > TCR0 > *(ioport volatile unsigned int *)0x2402 |= 0x8000; // IDLE Timer1 with > TCR1 > *(ioport volatile unsigned int *)0x0001 = 0x2e; // enable EMIF, > Peripheral, and DMA idle > asm(" IDLE"); > // delay of at least 2.5 us needed between the two IDLE instructions > *(ioport volatile unsigned int *)0x0001 = 0x3F; // enable EMIF, > Peripheral, DMA, CPU and Clock idle > asm(" IDLE"); > > When in oscillator down mode, the interrupts are LEVEL triggered! Pay > attention - the ~int lines must be in "hi"!! > > BR, > Andrej Novak > ----- Original Message ----- > From: mgray@e... > To: > Sent: Monday, February 21, 2005 2:27 AM > Subject: [c55x] C5509A Sleep Mode > > Anyone have any experience or comments on putting the C5509A into the > lowest power sleep mode. The low power sleep mode stops the external > crystal oscillator. You wake again with an external hardware interrupt > (IRQ type thing) or RTC alarm. I've had a very difficult time getting > it into this sleep mode and stopping the clock. Wake up is no problem. > > I've read all the app notes many, many times on setting everything > correctly (USB to DPLL mode, stopping domains, etc.) before entering last > idle state. > > Any hints? > > Thanks > > To |
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DLOG is associated with RTDX, the JTAG transport mechanism for real time data exchange. You can disable RTDX in your BIOS config file and this should get the 5509A to deep sleep. Select the RTDX module in the config tool and disable RTDX, also under the HST module change Link Type to 'none'. Just so you know, disabling RTDX will make it so the BIOS Real Time Analysis (RTA) plugins don't update in real time - only when the target halts. Thom -----Original Message----- From: kd7lmo [mailto:] Sent: Tuesday, March 01, 2005 4:38 PM To: Subject: [c55x] Re: C5509A Sleep Mode This helped a lot. It is ALMOST working. If I call the TSK_sleep before I enter the power down mode, the clock does not stop. After I wake up from the RTC, I notice the IFR1 register is set to 0x0200. This bit corresponds to the DLOG interrupt. I've masked all interrupts before I went to low power mode. But it appears as though I'm still getting an interrupt that is preventing the clock from stopping. There is little information on the DLOG interrupt. It appears that many DSP/BIOS kernel events (such as though triggered by TSK_sleep) are logged to LOG_system. How can I disable this system event logging? I tried LOG_disable(&LOG_system), but that didn't work. If I have the DSP/BIOS | Message Log window open, the system sleeps correctly. I assume it is causing the JTAG emulator pod to correctly read and process the LOG_system messages. If I don't have an emulator, is there some set of pull up/downs on the JTAG pins to indicate a pod isn't present and to ignore all data log messages? Is there a document on the DLOG / BIOS interaction and operation? Thanks for the help --- In , "Andrej Novak" <andrej.novak@a...> wrote: > > MGray, > > try with this code example: > > *(ioport volatile unsigned int *)0x6c00 = 0x8000; // Clockout disable > in External Bus Selection Register > *(ioport volatile unsigned int *)0x1e00 = 0x200; // set USB PLL to x4 > in USB PLL register > *(ioport volatile unsigned int *)0x1e00 = 0x210; // set lock bit > *(ioport volatile unsigned int *)0x7000 = 0x4; // activate USB (USB > Reset = 1) in USB IDLE Control register > *(ioport volatile unsigned int *)0x67FC |= 0x80; // pull DP high in > USB CTL > *(ioport volatile unsigned int *)0x7000 = 0x5; // activate USB and > enable USB idle (USB Reset =1, USB Idle = 1) > *(ioport volatile unsigned int *)0x6c00 = 0xc000; // Clockout & osc > disable in External Bus Selection Register > *(ioport volatile unsigned int *)0x3C09 = 0x1000; // IDLE IIC with > ICMDR > *(ioport volatile unsigned int *)0x2812 |=0x4000; // IDLE McBSP0 with > PCR0 > *(ioport volatile unsigned int *)0x2C12 |=0x4000; // IDLE McBSP1 with > PCR1 > *(ioport volatile unsigned int *)0x3012 |=0x4000; // IDLE McBSP2 with > PCR2 > *(ioport volatile unsigned int *)0x1002 |= 0x8000; // IDLE Timer0 with > TCR0 > *(ioport volatile unsigned int *)0x2402 |= 0x8000; // IDLE Timer1 with > TCR1 > *(ioport volatile unsigned int *)0x0001 = 0x2e; // enable EMIF, > Peripheral, and DMA idle > asm(" IDLE"); > // delay of at least 2.5 us needed between the two IDLE instructions > *(ioport volatile unsigned int *)0x0001 = 0x3F; // enable EMIF, > Peripheral, DMA, CPU and Clock idle > asm(" IDLE"); > > When in oscillator down mode, the interrupts are LEVEL triggered! Pay > attention - the ~int lines must be in "hi"!! > > BR, > Andrej Novak > ----- Original Message ----- > From: mgray@e... > To: > Sent: Monday, February 21, 2005 2:27 AM > Subject: [c55x] C5509A Sleep Mode > > Anyone have any experience or comments on putting the C5509A into the > lowest power sleep mode. The low power sleep mode stops the external > crystal oscillator. You wake again with an external hardware interrupt > (IRQ type thing) or RTC alarm. I've had a very difficult time getting > it into this sleep mode and stopping the clock. Wake up is no problem. > > I've read all the app notes many, many times on setting everything > correctly (USB to DPLL mode, stopping domains, etc.) before entering last > idle state. > > Any hints? > > Thanks > > To |
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Thom, Thanks for the fast response and great help. That fixed it and the C5509A is now in low power, sleep mode. I wish TI had a good app note that shows all the steps required to get there. There are bits and pieces, but nothing that shows start to finish how to disable the USB clocks, idle all the domains, and other little tricks. Thanks again. On Wed, 2 Mar 2005, Maughan, Thomas wrote: > > DLOG is associated with RTDX, the JTAG transport mechanism for real time > data exchange. > > You can disable RTDX in your BIOS config file and this should get the > 5509A to deep sleep. Select the RTDX module in the config tool and > disable RTDX, also under the HST module change Link Type to 'none'. > > Just so you know, disabling RTDX will make it so the BIOS Real Time > Analysis (RTA) plugins don't update in real time - only when the target > halts. > > Thom > -----Original Message----- > From: kd7lmo [mailto:] > Sent: Tuesday, March 01, 2005 4:38 PM > To: > Subject: [c55x] Re: C5509A Sleep Mode > > > This helped a lot. It is ALMOST working. > > If I call the TSK_sleep before I enter the power down mode, the clock > does not stop. After I wake up from the RTC, I notice the IFR1 > register is set to 0x0200. This bit corresponds to the DLOG > interrupt. I've masked all interrupts before I went to low power > mode. But it appears as though I'm still getting an interrupt that is > preventing the clock from stopping. > > There is little information on the DLOG interrupt. It appears that > many DSP/BIOS kernel events (such as though triggered by TSK_sleep) > are logged to LOG_system. > > How can I disable this system event logging? I tried > LOG_disable(&LOG_system), but that didn't work. > > If I have the DSP/BIOS | Message Log window open, the system sleeps > correctly. I assume it is causing the JTAG emulator pod to correctly > read and process the LOG_system messages. > > If I don't have an emulator, is there some set of pull up/downs on > the > JTAG pins to indicate a pod isn't present and to ignore all data log > messages? > > Is there a document on the DLOG / BIOS interaction and operation? > > Thanks for the help > > --- In , "Andrej Novak" <andrej.novak@a...> wrote: > > > > MGray, > > > > try with this code example: > > > > *(ioport volatile unsigned int *)0x6c00 = 0x8000; // Clockout > disable > > in External Bus Selection Register > > *(ioport volatile unsigned int *)0x1e00 = 0x200; // set USB > PLL to x4 > > in USB PLL register > > *(ioport volatile unsigned int *)0x1e00 = 0x210; // set lock > bit > > *(ioport volatile unsigned int *)0x7000 = 0x4; // activate > USB (USB > > Reset = 1) in USB IDLE Control register > > *(ioport volatile unsigned int *)0x67FC |= 0x80; // pull DP > high in > > USB CTL > > *(ioport volatile unsigned int *)0x7000 = 0x5; // activate > USB and > > enable USB idle (USB Reset =1, USB Idle = 1) > > *(ioport volatile unsigned int *)0x6c00 = 0xc000; // Clockout > & osc > > disable in External Bus Selection Register > > *(ioport volatile unsigned int *)0x3C09 = 0x1000; // IDLE IIC > with > > ICMDR > > *(ioport volatile unsigned int *)0x2812 |=0x4000; // IDLE > McBSP0 with > > PCR0 > > *(ioport volatile unsigned int *)0x2C12 |=0x4000; // IDLE > McBSP1 with > > PCR1 > > *(ioport volatile unsigned int *)0x3012 |=0x4000; // IDLE > McBSP2 with > > PCR2 > > *(ioport volatile unsigned int *)0x1002 |= 0x8000; // IDLE > Timer0 with > > TCR0 > > *(ioport volatile unsigned int *)0x2402 |= 0x8000; // IDLE > Timer1 with > > TCR1 > > *(ioport volatile unsigned int *)0x0001 = 0x2e; // enable > EMIF, > > Peripheral, and DMA idle > > asm(" IDLE"); > > // delay of at least 2.5 us needed between the two IDLE > instructions > > *(ioport volatile unsigned int *)0x0001 = 0x3F; // enable > EMIF, > > Peripheral, DMA, CPU and Clock idle > > asm(" IDLE"); > > > > When in oscillator down mode, the interrupts are LEVEL triggered! > Pay > > attention - the ~int lines must be in "hi"!! > > > > BR, > > Andrej Novak > > > > > > ----- Original Message ----- > > From: mgray@e... > > To: > > Sent: Monday, February 21, 2005 2:27 AM > > Subject: [c55x] C5509A Sleep Mode > > > > > > > > Anyone have any experience or comments on putting the C5509A into > the > > lowest power sleep mode. The low power sleep mode stops the > external > > crystal oscillator. You wake again with an external hardware > interrupt > > (IRQ type thing) or RTC alarm. I've had a very difficult time > getting > > it into this sleep mode and stopping the clock. Wake up is no > problem. > > > > I've read all the app notes many, many times on setting everything > > correctly (USB to DPLL mode, stopping domains, etc.) before entering > last > > idle state. > > > > Any hints? > > > > Thanks > > > > > > > > > > > > > > > > > > > > To |
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Not sure if you've seen this - but there is some online training and docs sets available at: http://focus.ti.com/docs/general/splashdsp.jhtml?&path=templatedata/cm/s plashdsp/data/c5000_perf_pricead&DCMP=DSP_C5000&HQS=NotApplicable+OT+pow erefficientperfd Best regards, Thom -----Original Message----- From: [mailto:] Sent: Wednesday, March 02, 2005 11:39 AM To: Maughan, Thomas Cc: Subject: RE: [c55x] Re: C5509A Sleep Mode Thom, Thanks for the fast response and great help. That fixed it and the C5509A is now in low power, sleep mode. I wish TI had a good app note that shows all the steps required to get there. There are bits and pieces, but nothing that shows start to finish how to disable the USB clocks, idle all the domains, and other little tricks. Thanks again. On Wed, 2 Mar 2005, Maughan, Thomas wrote: > > DLOG is associated with RTDX, the JTAG transport mechanism for real time > data exchange. > > You can disable RTDX in your BIOS config file and this should get the > 5509A to deep sleep. Select the RTDX module in the config tool and > disable RTDX, also under the HST module change Link Type to 'none'. > > Just so you know, disabling RTDX will make it so the BIOS Real Time > Analysis (RTA) plugins don't update in real time - only when the target > halts. > > Thom > -----Original Message----- > From: kd7lmo [mailto:] > Sent: Tuesday, March 01, 2005 4:38 PM > To: > Subject: [c55x] Re: C5509A Sleep Mode > > > This helped a lot. It is ALMOST working. > > If I call the TSK_sleep before I enter the power down mode, the clock > does not stop. After I wake up from the RTC, I notice the IFR1 > register is set to 0x0200. This bit corresponds to the DLOG > interrupt. I've masked all interrupts before I went to low power > mode. But it appears as though I'm still getting an interrupt that is > preventing the clock from stopping. > > There is little information on the DLOG interrupt. It appears that > many DSP/BIOS kernel events (such as though triggered by TSK_sleep) > are logged to LOG_system. > > How can I disable this system event logging? I tried > LOG_disable(&LOG_system), but that didn't work. > > If I have the DSP/BIOS | Message Log window open, the system sleeps > correctly. I assume it is causing the JTAG emulator pod to correctly > read and process the LOG_system messages. > > If I don't have an emulator, is there some set of pull up/downs on > the > JTAG pins to indicate a pod isn't present and to ignore all data log > messages? > > Is there a document on the DLOG / BIOS interaction and operation? > > Thanks for the help > > --- In , "Andrej Novak" <andrej.novak@a...> wrote: > > > > MGray, > > > > try with this code example: > > > > *(ioport volatile unsigned int *)0x6c00 = 0x8000; // Clockout > disable > > in External Bus Selection Register > > *(ioport volatile unsigned int *)0x1e00 = 0x200; // set USB > PLL to x4 > > in USB PLL register > > *(ioport volatile unsigned int *)0x1e00 = 0x210; // set lock > bit > > *(ioport volatile unsigned int *)0x7000 = 0x4; // activate > USB (USB > > Reset = 1) in USB IDLE Control register > > *(ioport volatile unsigned int *)0x67FC |= 0x80; // pull DP > high in > > USB CTL > > *(ioport volatile unsigned int *)0x7000 = 0x5; // activate > USB and > > enable USB idle (USB Reset =1, USB Idle = 1) > > *(ioport volatile unsigned int *)0x6c00 = 0xc000; // Clockout > & osc > > disable in External Bus Selection Register > > *(ioport volatile unsigned int *)0x3C09 = 0x1000; // IDLE IIC > with > > ICMDR > > *(ioport volatile unsigned int *)0x2812 |=0x4000; // IDLE > McBSP0 with > > PCR0 > > *(ioport volatile unsigned int *)0x2C12 |=0x4000; // IDLE > McBSP1 with > > PCR1 > > *(ioport volatile unsigned int *)0x3012 |=0x4000; // IDLE > McBSP2 with > > PCR2 > > *(ioport volatile unsigned int *)0x1002 |= 0x8000; // IDLE > Timer0 with > > TCR0 > > *(ioport volatile unsigned int *)0x2402 |= 0x8000; // IDLE > Timer1 with > > TCR1 > > *(ioport volatile unsigned int *)0x0001 = 0x2e; // enable > EMIF, > > Peripheral, and DMA idle > > asm(" IDLE"); > > // delay of at least 2.5 us needed between the two IDLE > instructions > > *(ioport volatile unsigned int *)0x0001 = 0x3F; // enable > EMIF, > > Peripheral, DMA, CPU and Clock idle > > asm(" IDLE"); > > > > When in oscillator down mode, the interrupts are LEVEL triggered! > Pay > > attention - the ~int lines must be in "hi"!! > > > > BR, > > Andrej Novak > > > > > > ----- Original Message ----- > > From: mgray@e... > > To: > > Sent: Monday, February 21, 2005 2:27 AM > > Subject: [c55x] C5509A Sleep Mode > > > > > > > > Anyone have any experience or comments on putting the C5509A into > the > > lowest power sleep mode. The low power sleep mode stops the > external > > crystal oscillator. You wake again with an external hardware > interrupt > > (IRQ type thing) or RTC alarm. I've had a very difficult time > getting > > it into this sleep mode and stopping the clock. Wake up is no > problem. > > > > I've read all the app notes many, many times on setting everything > > correctly (USB to DPLL mode, stopping domains, etc.) before entering > last > > idle state. > > > > Any hints? > > > > Thanks > > > > > > > > > > > > > > > > > > > > To |