Hello everyone,

I'm trying to use MCSI1 with data transfer performed by DMA on
OMAP5912. My objective is to transfer 48 registers (16 bits each
register), but each time I run the application, only the first
register is written on the output several times (until MCSI's clock is
disabled). The event that syncs the element transfer on DMA is the
frame sync generated by MCSI1 TX. It seems that the source address for
DMA reading data is not being incremented, although post-increment
parameter is set on DMA config registers. DMA is activated on MCSI1
parameter (only TX transfer by DMA).

If you don't mind I would like to post the portion of my code that
configures the DMA.

DSP_DMA_GCR	= 0x000c;	// Global Control Reg
DSP_DMA_GSCR	= 0x0001;	// Global Software Compatibility Reg
DSP_DMA_GTCR	= 0x0000;	// Global Timeout Control Reg
  
DSP_DMA_CSDP0	= 0x0605;	// Channel 0 Source and Dest. Parameter Reg
DSP_DMA_CCR0	= 0x1041;	// Channel 0 Control Reg
DSP_DMA_CICR0	= 0x0020;	// Channel 0 Interrupt Control Reg

DSP_DMA_CSSA_L0	= (((long)intRegProg << 1) & (0xffff));	// Channel 0
Source Start Address Lower Part Reg

DSP_DMA_CSSA_U0	= (((long)intRegProg >> 15) & (0x00ff));// Channel 0
Source Start Address Upper Part Reg

DSP_DMA_CDSA_L0	= ((((long)(ioport int*)0x9420) << 1) & (0xffff));	//
Channel 0 Dest. Start Address Lower Part Reg

DSP_DMA_CDSA_U0	= ((((long)(ioport int*)0x9420) >> 15) & (0x0001));	//
Channel 0 Dest. Start Address Upper Part Reg

DSP_DMA_CEN0		= QTD_REG_PROG_TX;	// Element Number Reg
DSP_DMA_CFN0		= 0x0001;		// Frame Number Reg
	//Enable DMA channel 0

DSP_DMA_CCR0 = DSP_DMA_CCR0 | 0x0080; //Enable DMA 

//Start MCSI1 clock
  
DSP_MCSI1_Control = 0x0001;
	Do anyone have any idea on what I should do now? Am I forgetting to
set something? Help me please!!

I really aprecciate any help.

Regards,

Rafael.