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Technical discussions about the TI C6000 DSPs (including the c62x, c64x and c67x DSPs).
Re: UART on DSK6713 [2 Articles]
avin...@gmail.com - Apr 22 2010
Hi,
All these days since my last post I have been trying to make it work, but unfortunately the problem is same.When i run the programm and check using symbol watch, the xmitbuf h... 
QCIF display configuration parameters and TVP7115 header file
srih...@gmail.com - Apr 21 2010
Hi Friends,
I have a grayscale project( grayscale.pjt) where the video from the digital camera is displayed onto the monitor, basically a pass through video using the DM642 EV... Re: ++WINTECH+TDS510PLUSE+Jtag+Emulator
Richard Williams - Apr 21 2010
Michael,
I'm not so thin skinned as to be insulted.
I just wrote the fact, I do not know anything about the two emulators being discussed.
I was originally referring to my exp... Re:++WINTECH+TDS510PLUSE+Jtag+Emulator [5 Articles]
J J - Apr 21 2010
Dear
I was Run xdsprobe .It Does work!!
Errorr Mesage is:
C:\CCStudio_v3.3\cc\bin> xdsprobe.exe
-----[Select and reset the controller]-------------------------------------... Re:++WINTECH+TDS510PLUSE+Jtag+Emulator [2 Articles]
J J - Apr 21 2010
Dear All
Very thanks for your advises,
I can program c6455 DSK with Wintech TDS560 but Wintech TDS510plus does not work.
... WINTECH TDS510PLUSE Jtag Emulator [5 Articles]
J J - Apr 21 2010
Dear All
I want program digitalspectrum c6455 DSK with WINTECH TDS510PLUSE Jtag Emulator,
But when I connect board this error display
Error connecting to the target:
Error 0x... size of code size increases C6474 EEPROM [8 Articles]
"Manimaran Subramanian - ERS, HCL Tech" - Apr 20 2010
... edma $ mcbsp configuration and sequence problems [8 Articles]
fx-7...@163.com - Apr 18 2010
hello everyone!
I'm now doing a project focus on transmission of data thru mcbsp that controlled by edma.the project is based on the 'app_dsk' demo.in the demo project,it uses... EDMA transfers between CE spaces of the same EMIF [2 Articles]
vlad...@elisra.com - Apr 18 2010
Hi there.
I'm using C6415 in my circuit with the EMIFA connected to an SDRAM on CE0 and an FPGA on CE2 (configured as a programmable synchronous memory), both having the same bus ... TI C6474 CSL, DSP/BIOS footprint calculation [4 Articles]
"Manimaran Subramanian - ERS, HCL Tech" - Apr 17 2010
...