Technical discussions about the TI C6000 DSPs (including the c62x, c64x and c67x DSPs).
Hey guys,
I try to transfer data from internal to external memory using the DAT_copy2d
function.
Here are the relevant parts of my test program (I am using the DM642 cycle
accurate simulator.):
#pragma DATA_SECTION(bufferTest,".test") // section test is mapped to
external memory
#pragma DATA_ALIGN(bufferTest2,8)
#pragma DATA_ALIGN(bufferTest,8)
uint8_t bufferTest[16] = {1,2,3,4,5,6,7,87,9,10,6,4,2,6,8,3}; // uint8_t = 8
bit
uint8_t bufferTest2[8] ={33,33,33,33,33,33,33,33};
main() {
....
CSL_init();
CACHE_enableCaching(CACHE_EMIFA_CE00);
CACHE_setL2Mode(CACHE_32KCACHE);
....
flag1 = DAT_open ( DAT_CHAANY, DAT_PRI_LOW, DAT_OPEN_2D);
CACHE_wbInvAllL2(CACHE_WAIT);
id1 = DAT_copy2d(DAT_1D2D, bufferTest2,bufferTest,2,2,2);
DAT_wait(id1);
...
}
As long as "bufferTest"is in internal memory, it works fine, the first 4
bytes are copied.
As soon as I move bufferTest to external memory the transfer doesn't work as
expected anymore:
Sometimes it writes only the first byte, sometimes nothing, sometimes at
wrong places.
I'll appreciate it If anybody can tell me how I properly move Data from
internal Ram to external .
-dorian
Check Out Industry's First Single-Chip, Multi-Format, Real-Time HD Video Transcoding Solution
for Commercial & Consumer End Equipment: www.ti.com/dm6467
Hey Chao, Dear Group
=D0=BB=D0=BB=C4=E3=A1=A3
I need Caching enabled in my application so, as you suggested in second
order I put a=20=20
"CACHE_wbL2(bufferTest2, 8, CACHE_WAIT);" after the DAT_wait() line.=20
You are right, the DMA started to copy !
But as usual, as soon as I "solve" one problem, the next one pops up... I
hate it ... nothing is smooth.
Anyway, the DMA ONLY copies if the " lineLen" parameter (4th param of
DAT_copy2d) is 2.=20
Anything else (but 6) doesn=A1=AFt transfer data. I really start hating thi=
s DMA
sh**.
(Again, if bufferTest is in internal Ram, it works with any parameter)
Here is the code that only works properly with lineLen =3D 2:
#pragma DATA_SECTION(bufferTest,".test") // section test is mapped to
external memory
#pragma DATA_ALIGN(bufferTest2,8)
#pragma DATA_ALIGN(bufferTest,8)=20
uint8_t bufferTest[16] =3D {1,2,3,4,5,6,7,87,9,10,6,4,2,6,8,3}; // uint8_t =
=3D 8
bit
uint8_t bufferTest2[8] =3D{33,33,33,33,33,33,33,33};
main() {
....
CSL_init();
CACHE_enableCaching(CACHE_EMIFA_CE00);
CACHE_setL2Mode(CACHE_32KCACHE);
....
flag1 =3D DAT_open (
DAT_CHAANY,
DAT_PRI_LOW,
DAT_OPEN_2D
);
//CACHE_wbL2(bufferTest2, 8, CACHE_WAIT);
id1 =3D DAT_copy2d(DAT_1D2D, bufferTest2,bufferTest,2,4,10); // why onl=
y 2
works ? I need to transfer a 16x16 array
DAT_wait(id1);
CACHE_wbL2(bufferTest2, 8, CACHE_WAIT);
....
}
Check Out Industry's First Single-Chip, Multi-Format, Real-Time HD Video Tr=
anscoding Solution for Commercial & Consumer End Equipment: www.ti.com/dm64=
67
=20
Hey guys, here is my extremely sophisticated solution for the problem: Use code composer 3.3 instead of 3.1 - et viol=E0 ! -dorian Check Out Industry's First Single-Chip, Multi-Format, Real-Time HD Video Tr= anscoding Solution for Commercial & Consumer End Equipment: www.ti.com/dm64= 67 =20