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Hi Folks,

I have already stated my problem regarding QDMA transfer in my last 
mail. (I am trying to run the code in DM6446 simulator of CCS3.3 
beta/CCS3.3 free edition)

-----------------------------------------------------------------------------------------------
-------------------------------------------------------------------------
@ All,

I have gone through the EDMA related sprue. I am not able to understand
the difference EDMA global region and Shadow region differences? In the
code its using QREA mapped to 0x1c00380. So if I set QREA as 0xFF then
will I be able to restrict the global region or shadow region 0. The
CCS3.3 simulator of DM6446 does not shows ARM9 in the set up. So I am
worried whether my code is trying to use ARm9 as EDMA master. If yes,
then how I can transfer it to DSP. How to enble device interupt
controller in this case so that CPU can understand the EDMA interrupt.

If any one of you have time then please explain me the whole process in
brief, or send me some ppt which has brief and lucid description of EDMA3 .
-----------------------------------------------------------------------------------------------
-------------------------------------------------------------------------

Currently  I have analyzed this problem again from QDMA open to QDMA 
close. The problem lies in the QDMA_wait() function which is already 
implemented in the code. Implementation wise its perfectly alright. All 
the registers are set accordingly.

Now when I am trying to do a dummy transfer of 4 bytes (QDMA is auto 
triggered through IDMA0) its not setting the IPRH register which is 
mapped to a memory of  0x1c0106c.  TCC = 32 and TCINTEN is 1 in the 
PaRAM OPT word.

It seems to me the DM6446 simulator is not able to properly simulate 
EDMA3CC which is in turn responsible for setting of the IPR/IPRH 
register bits (Bit num is TCC, here 32) .

(Excluding that, DAT_copy() function is also not working)

Anyone from this group have ever faced the same problem?

I have seen the simDM6446.cfg file from CCS3.3/drivers folder. I found 
no indication of EDMA submodule. It tell something about DMA and QDMA 
channel number (here DMA ch# = 64, QDMA Ch# = 8) in the 3PCC submodule. 
What is this 3PCC? How can I find some documentation about DM6446 
related 3PCC specifications?

Any help will be highly appreciated.

Thanks,
Nilanjan

------------------------------------

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for Commercial & Consumer End Equipment: www.ti.com/dm6467

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Hi Nilanjan,

I haven't dealt with a DM6446 simulator, as I have a real hardware platform,
but if I should I'd consider to check what are the simulator properties in the
CCS setup utility. It says something about release notes, though I found no
traces of them. I wouldn't be surprised if it occurs that the simulator
supports only a quite restricted set of the functionality of the modelled device.
It might be that neither DMA nor INTC are implemented in the simulator at all.

I am not certain for which target you build your code, but I bet it is 
specified in the project's build options. You might want to check it as well.

Is it critical to use the DM6446 simulator? There are two separate simulators
to play with, an ARM926EJ-S and an C6455. The latter seem to run the DMA 
module, but I am not sure if it has the INTC.

Rgds,

Andrew

> Subject: EDMA3CC not setting IPR on transfer completion (DM6446 simulator)
> Posted by: "Nilanjan Goswami" n...@cal.interrasystems.com nilanjangoswami
> Date: Fri Apr 11, 2008 4:02 am ((PDT))
>
> Hi Folks,
>
> I have already stated my problem regarding QDMA transfer in my last
> mail. (I am trying to run the code in DM6446 simulator of CCS3.3
> beta/CCS3.3 free edition)
>
>
-----------------------------------------------------------------------------------------------
-------------------------------------------------------------------------
> @ All,
>
> I have gone through the EDMA related sprue. I am not able to understand
> the difference EDMA global region and Shadow region differences? In the
> code its using QREA mapped to 0x1c00380. So if I set QREA as 0xFF then
> will I be able to restrict the global region or shadow region 0. The
> CCS3.3 simulator of DM6446 does not shows ARM9 in the set up. So I am
> worried whether my code is trying to use ARm9 as EDMA master. If yes,
> then how I can transfer it to DSP. How to enble device interupt
> controller in this case so that CPU can understand the EDMA interrupt.
>
> If any one of you have time then please explain me the whole process in
> brief, or send me some ppt which has brief and lucid description of EDMA3 .
>
-----------------------------------------------------------------------------------------------
-------------------------------------------------------------------------
>
> Currently  I have analyzed this problem again from QDMA open to QDMA
> close. The problem lies in the QDMA_wait() function which is already
> implemented in the code. Implementation wise its perfectly alright. All
> the registers are set accordingly.
>
> Now when I am trying to do a dummy transfer of 4 bytes (QDMA is auto
> triggered through IDMA0) its not setting the IPRH register which is
> mapped to a memory of  0x1c0106c.  TCC = 32 and TCINTEN is 1 in the
> PaRAM OPT word.
>
> It seems to me the DM6446 simulator is not able to properly simulate
> EDMA3CC which is in turn responsible for setting of the IPR/IPRH
> register bits (Bit num is TCC, here 32) .
>
> (Excluding that, DAT_copy() function is also not working)
>
> Anyone from this group have ever faced the same problem?
>
> I have seen the simDM6446.cfg file from CCS3.3/drivers folder. I found
> no indication of EDMA submodule. It tell something about DMA and QDMA
> channel number (here DMA ch# = 64, QDMA Ch# = 8) in the 3PCC submodule.
> What is this 3PCC? How can I find some documentation about DM6446
> related 3PCC specifications?
>
> Any help will be highly appreciated.
>
> Thanks,
> Nilanjan
>

------------------------------------

Check Out Industry's First Single-Chip, Multi-Format, Real-Time HD Video Transcoding Solution
for Commercial & Consumer End Equipment: www.ti.com/dm6467

(You need to be a member of c6x -- send a blank email to c6x-subscribe@yahoogroups.com )