AD535 | BIOS | Booting | Bootloader | C621 | C6211 | C6415 | C671 | C6711 | C6711DSK | C6713 | CCS | Chassaing | COFF | DAT | DM64 | DM642 | DMA | DSK671 | DSK6711 | EDM | EDMA | EMIF | Emulator | EVM | EVM620 | FFT | FIR | GPIO | Halting | HPI | HWI | IDK | JTAG | LDB | LDH | LDW | Linker | LMS | LOG_printf | Matlab | McBSP | MEM_alloc | MIPS | PCI | PCM3003 | Pipeline | Profiling | QDM | Reset | ROM | RTDX | Sampling | SDRAM | Stack | TEB | THS1206 | TMS320C621 | TMS320C6416 | TMS320C6711 | TMS320C6713 | UART | Vector Table | XBUS | XDS560

Hello, c6x! i have got a problem, How can i organize a multiprocessor structure (f.e. 8 processors c6711) with maximum efficient of connect speed. What can be useful: Use global SRAM and make it accessible to all processors and/or use connections between processors by serial ports (i am not sure but i have not seen before exept fot c4x (it has 4 links as i know)the way how i could connect two proceccors). So the question is how to organize a multiprocessor structure on c6711 more efficiently (may be there were ready made projects to see), and how i can organize exchange of data between processors (not using global SRAM). Great thanks Evgeny P.

______________________________
New Code Sharing Section now Live on DSPRelated.com. Learn about the Reward Program for Contributors here.



(You need to be a member of c6x -- send a blank email to c6x-subscribe@yahoogroups.com )

Hi,friend,I think there are two way to do it. (1)using Bi-FIFO to connect each DSP,if have 4 DSP, need 6 Bi-FIFO (2) using Bi-FIFO to connect each DSP with a crossbar,crossbar can done by a FPGA. so any DSP can communicate with any other DSP by crossbar baelroga <> wrote:Hello, c6x! i have got a problem, How can i organize a multiprocessor structure (f.e. 8 processors c6711) with maximum efficient of connect speed. What can be useful: Use global SRAM and make it accessible to all processors and/or use connections between processors by serial ports (i am not sure but i have not seen before exept fot c4x (it has 4 links as i know)the way how i could connect two proceccors). So the question is how to organize a multiprocessor structure on c6711 more efficiently (may be there were ready made projects to see), and how i can organize exchange of data between processors (not using global SRAM). Great thanks Evgeny P. _____________________________________ ---------------------------------

______________________________
New Code Sharing Section now Live on DSPRelated.com. Learn about the Reward Program for Contributors here.



(You need to be a member of c6x -- send a blank email to c6x-subscribe@yahoogroups.com )

Use a SHARC instead ? :-) Not very heplful, but they are better designed for multi-processor apps! Cheers, Martin -- Martin Thompson BEng(Hons) CEng MIEE TRW Conekt Stratford Road, Solihull, B90 4GW. UK Tel: +44 (0)121-627-3569 - >>> "baelroga" <> 29 October 2002 09:46:38 >>> Hello, c6x! i have got a problem, How can i organize a multiprocessor structure (f.e. 8 processors c6711) with maximum efficient of connect speed. What can be useful: Use global SRAM and make it accessible to all processors and/or use connections between processors by serial ports (i am not sure but i have not seen before exept fot c4x (it has 4 links as i know)the way how i could connect two proceccors). So the question is how to organize a multiprocessor structure on c6711 more efficiently (may be there were ready made projects to see), and how i can organize exchange of data between processors (not using global SRAM). Great thanks Evgeny P. _____________________________________

______________________________
New Code Sharing Section now Live on DSPRelated.com. Learn about the Reward Program for Contributors here.



(You need to be a member of c6x -- send a blank email to c6x-subscribe@yahoogroups.com )

Martin- > Use a SHARC instead ? :-) Gasp! And all this time I thought you were a true believer :-) -Jeff > -- > Martin Thompson BEng(Hons) CEng MIEE > TRW Conekt > Stratford Road, Solihull, B90 4GW. UK > Tel: +44 (0)121-627-3569 - > > >>> "baelroga" <> 29 October 2002 09:46:38 >>> > Hello, c6x! > > i have got a problem, > How can i organize a multiprocessor structure (f.e. 8 processors > c6711) with maximum efficient of connect speed. > What can be useful: > Use global SRAM and make it accessible to all processors and/or use > connections between processors by serial ports (i am not sure but i > have not seen before exept fot c4x (it has 4 links as i know)the way > how i could connect two proceccors). > > So the question is how to organize a multiprocessor structure on > c6711 more efficiently (may be there were ready made projects to > see), and how i can organize exchange of data between processors (not > using global SRAM). > > Great thanks > Evgeny P.

______________________________
New Code Sharing Section now Live on DSPRelated.com. Learn about the Reward Program for Contributors here.



(You need to be a member of c6x -- send a blank email to c6x-subscribe@yahoogroups.com )