[Fwd: BIOS profiling not matching cycle counts] | TMS320C6x

Technical discussions about the TI C6000 DSPs (including the c62x, c64x and c67x DSPs).

All-

Forgot to mention:  we read the PLL1 multiplier control register and verified
that BIOS had set a multiplier of 28 (25
MHz onboard osc x 28 = 700 MHz).  The divider is not enabled.

-Jeff

--------------- Original Message --------------
Subject: BIOS profiling not matching cycle counts
From:    "Jeff Brower" <j...@signalogic.com>
Date:    Fri, October 8, 2010 9:35 pm
To:      c...@yahoogroups.com
-----------------------------------------------

All-

We're using Clock_getTicks() BIOS API to profile code.  Results do not match
cycle counts by a factor of 10:  about 50
sec vs. expectation of 5 sec (cycle counts determined by looking at generated
.asm).  We're using CCS 4.2, BIOS6, and
EVM C6472.  All code and data is in onchip RAM, the only interrupt enabled is
TIMER0 for BIOS.

A few questions:

1) Is there any reason not to use BIOS APIs for C64x+ profiling?  For example we
could disable interrupts, read TIMER0
directly, then re-enable interrupts...

2) In CCS 4.2 there doesn't appear to be a Free Run option (as in CCS 3.x). 
What is the best way to verify that CCS
is not "doing something" over JTAG during the measurement?

3) If pipeline stalls are occurring for any reason, what is the best way to
determine and/or measure?

-Jeff

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[Fwd: BIOS profiling not matching cycle counts] - Jeff Brower - Oct 8 22:27:34 2010