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hi! I'm new using the c6211 and want to test the benefit of using the cache. But there have something comfuse me:   First,I load the program (dot-product of 300 samples) from 0x80000000(External memory interface CE0) and DO NOT open the cache,then get the cycles N1.   Second,I load the promgram from 0x80000000 and OPEN the cache,then get the cycles N2.   Lastly,I load the promgram from 0x800(use L2 cache as 64K bytes SRAM),and it can be completely load into onchip-memory,then get the cycles N3.   Now,we can find that N2 is more less than N1,It's OKay,but we also find that N3 is slightly great than N2!!   How can we explain this? If we can say that when we use the L2 cache as SRAM,we also disable L1P/D cahce?   Thanks, Yelang

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Hello Yelang, >hi! >I'm new using the c6211 and want to test the benefit of using the cache. >But there have something comfuse me: > >First,I load the program (dot-product of 300 samples) from 0x80000000(External memory interface >CE0) and DO NOT open the cache,then get the cycles N1. Where is the data stored? >Second,I load the promgram from 0x80000000 and OPEN the cache,then get the cycles N2. > >Lastly,I load the promgram from 0x800(use L2 cache as 64K bytes SRAM),and it can be >completely load into onchip-memory,then get the cycles N3. > >Now,we can find that N2 is more less than N1,It's OKay,but we also find that N3 is slightly great >than N2!! > >How can we explain this? If we can say that when we use the L2 cache as SRAM,we also disable >L1P/D cahce? I don't think you *can* disable the L1 cache. Fundamentally, the C6x11 devices are cache based, and *cannot* access program memory directly. So maybe the difference comes down to where your data are stored? Cheers, Martin -- Martin Thompson BEng(Hons) CEng MIEE TRW Automotive Advanced Product Development, Stratford Road, Solihull, B90 4GW. UK Tel: +44 (0)121-627-3569 mailto:

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thank you for your help! When I load the programe to CE0 space,I also store the data to CE0 space. And then I load both the programe and data to onchip-memory. thank you. Yelang ----- Original Message ----- From: Martin.J Thompson <> To: <>; <> Sent: Tuesday, March 27, 2001 10:44 PM Subject: Re: [c6x] the cache of c6211 Hello Yelang, >hi! >I'm new using the c6211 and want to test the benefit of using the cache. >But there have something comfuse me: > >First,I load the program (dot-product of 300 samples) from 0x80000000(External memory interface >CE0) and DO NOT open the cache,then get the cycles N1. Where is the data stored? >Second,I load the promgram from 0x80000000 and OPEN the cache,then get the cycles N2. > >Lastly,I load the promgram from 0x800(use L2 cache as 64K bytes SRAM),and it can be >completely load into onchip-memory,then get the cycles N3. > >Now,we can find that N2 is more less than N1,It's OKay,but we also find that N3 is slightly great >than N2!! > >How can we explain this? If we can say that when we use the L2 cache as SRAM,we also disable >L1P/D cahce? I don't think you *can* disable the L1 cache. Fundamentally, the C6x11 devices are cache based, and *cannot* access program memory directly. So maybe the difference comes down to where your data are stored? Cheers, Martin -- Martin Thompson BEng(Hons) CEng MIEE TRW Automotive Advanced Product Development, Stratford Road, Solihull, B90 4GW. UK Tel: +44 (0)121-627-3569 mailto:

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