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Discussion Groups | TMS320C6x | RESET phases in C6713
Technical discussions about the TI C6000 DSPs (including the c62x, c64x and c67x DSPs).
RESET phases in C6713 - vbehravan - Jan 22 3:27:00 2005
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As mentioned in TMS320C6713 datasheet, it has a three phase RESET and in phase2(Internal RESET) ECLKOUT Signal will be CLKIN frequency divide-by-8. Since in Our Circuit DSP is in HPI bootloading mode, after RESET, ECLKOUT must remain at CLKIN/8 untill bootloading terminate and then ECLKOUT will be CLKIN/2 (by default). but when we reset the circuit from first, ECLKOUT is CLKIN/2!! anyhbody can help us?!! |
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Re: RESET phases in C6713 - Jeff Brower - Jan 22 15:26:00 2005
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V Behravan- > As mentioned in TMS320C6713 datasheet, it has a three phase RESET and > in phase2(Internal RESET) ECLKOUT Signal will be CLKIN frequency > divide-by-8. Since in Our Circuit DSP is in HPI bootloading mode, > after RESET, ECLKOUT must remain at CLKIN/8 untill bootloading > terminate and then ECLKOUT will be CLKIN/2 (by default). > but when we reset the circuit from first, ECLKOUT is CLKIN/2!! > anyhbody can help us?!! It does sound like a discrepancy... but I want to ask you a question: why do you need CLKIN/8 during HPI boot? Clock speed is irrelevant to HPI transfer speed, since HPI is a target interface and rate is controlled by external processor (master). If the issue is that SDRAM is not initialized yet, and you are moving code directly to SDRAM, then I might suggest that you first bootload a small piece of code, let it run and initialize SDRAM and set ECLKOUT rate, then finish loading remainder of code. -Jeff |
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