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Hi,

We want to reduce the power consumption of a custom designed
board with a TMS320C6416GLZ DSP running at 480MHz. As the DSP needs
to come out of sleep on occurance of a periodic interrupt, we have
used PD1. All unused io pins are grounded. The DSP is put in power
down for approx.40% of time. Still we are not able to see any
reduction in power consumption.

The power down mode is initiated in a timer ISR.

Pl. tell us how the power consumption could be reduced without
opting for PD2 or PD3.

Awaiting for your response.
Regards,
Veeresh



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Veeresh-

> We want to reduce the power consumption of a custom designed
> board with a TMS320C6416GLZ DSP running at 480MHz. As the DSP needs
> to come out of sleep on occurance of a periodic interrupt, we have
> used PD1. All unused io pins are grounded. The DSP is put in power
> down for approx.40% of time. Still we are not able to see any
> reduction in power consumption.
>
> The power down mode is initiated in a timer ISR.
>
> Pl. tell us how the power consumption could be reduced without
> opting for PD2 or PD3.

Are you saying that between normal operation and PD1 you can see no reduction? How
are you verifying the device is in PD1?

-Jeff





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This is from Vereesh.

Veeresh, please post to the group! The subject of power savings on C64xx processors
is an active topic and I'm sure you will get some answers.

-Jeff

veeresh8210 wrote:
>
> Hi Jeff,
>
> To check working of PD1 what i did is, in scheduling activities,
> on setting of a flag, i used to disable other interrupts and wdt and
> put it into power down permanently. I tried all the 3 modes. The PD2
> and PD3 result in very large current difference. But with PD1 the
> current difference is very small. Even if the EDMA interrupt is
> disabled, the currents drawn are comparable to PD1. There is no
> difference in IO current.
> Waiting for your response,
> Thank you.
> Regards,
> Veeresh
>
> --- In c6x@c6x@..., Jeff Brower <jbrower@s...> wrote:
> > Veeresh-
> >
> > > We want to reduce the power consumption of a custom designed
> > > board with a TMS320C6416GLZ DSP running at 480MHz. As the DSP
> needs
> > > to come out of sleep on occurance of a periodic interrupt, we have
> > > used PD1. All unused io pins are grounded. The DSP is put in
> power
> > > down for approx.40% of time. Still we are not able to see any
> > > reduction in power consumption.
> > >
> > > The power down mode is initiated in a timer ISR.
> > >
> > > Pl. tell us how the power consumption could be reduced without
> > > opting for PD2 or PD3.
> >
> > Are you saying that between normal operation and PD1 you can see no
> reduction? How
> > are you verifying the device is in PD1?
> >
> > -Jeff





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Hi,

Is it possible to connect multiple DSPs (C6415) configuration pins
together and share one set of configuration resistors? The scenario is
like this: 8 C6415 forms a DSP farm. Each DSP needs to be configured
using pull-up/pull-down resistors. The configurations will be identical
for all DSPs. So I would like to use one set of resistors to configure
all the DSPs to save board space. The problem is C6415 uses the EMIFB's
address lines as the configuration inputs. So in my design I need to
hook the 8 DSPs EMIFB's address line together, which would be a big
mistake if I would use the EMIFB after boot. *BUT*, EMIFB in my design
is not used at all. Now the question is: Is my design feasible? Is there
a way to disable EMIFB so the address lines would be high-Z after boot?
And if I am using the HPI boot, the EMIFB won't be used during the boot,
is this correct?

I guess I need some sort of confirmation from whoever did this before.
It would be scary if I go with my design and find out that it won't work
when I have the prototype in hand.

Thank you in advance for the help.

Regards,

Jane





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