Technical discussions about the TI C6000 DSPs (including the c62x, c64x and c67x DSPs).
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Hi everyone I'm using three DMA channels inside a c6202 DSP, two of them synchronized by external interrupts generated by FIFOs. The third one is aimed to be started upon a frame sync of DMA0 (read a complete set of data from a FIFO). The problem is that this interrupt never raises, despite I've enabled TCINT and Frame Sync and the DMA0 is effectively reading from the FIFO. The same programming works if I associate this transfer to the DMA writing to the output FIFO (DMA1). Can anyone tell me what's wrong with that? I'm using DSP/BIOS, CCS 2.0. ''~`` ( o o ) +-----------------.oooO--(_)--Oooo.-----------------+ | | | PABLO FRAILE | | .oooO | | ( ) Oooo. | +--------------------\ (----( )-------------------+ \_) ) / (_/ |