AD535 | BIOS | Booting | Bootloader | C621 | C6211 | C6415 | C671 | C6711 | C6711DSK | C6713 | CCS | Chassaing | COFF | DAT | DM64 | DM642 | DMA | DSK671 | DSK6711 | EDM | EDMA | EMIF | Emulator | EVM | EVM620 | FFT | FIR | GPIO | Halting | HPI | HWI | IDK | JTAG | LDB | LDH | LDW | Linker | LMS | LOG_printf | Matlab | McBSP | MEM_alloc | MIPS | PCI | PCM3003 | Pipeline | Profiling | QDM | Reset | ROM | RTDX | Sampling | SDRAM | Stack | TEB | THS1206 | TMS320C621 | TMS320C6416 | TMS320C6711 | TMS320C6713 | UART | Vector Table | XBUS | XDS560

hi, i am using ccs2 for 621x. I was Profiling a 'for loop' of my c-code which loops for count=200, few equations in it. For this case I got clock=15050. but when i made count =1 (i.e., only one iteration), I am getting clock = 550. so for count=200, clock becomes 550*200 which is not correct. where i am going wrong???? looking forward to your replies. bye

______________________________
New Code Sharing Section now Live on DSPRelated.com. Learn about the Reward Program for Contributors here.



(You need to be a member of c6x -- send a blank email to c6x-subscribe@yahoogroups.com )

simha j wrote: > hi, > > i am using ccs2 for 621x. > I was Profiling a 'for loop' of my c-code which loops > for count=200, few equations in it. > For this case I got clock=15050. > > but when i made count =1 (i.e., only one iteration), > I am getting clock = 550. > > so for count=200, clock becomes 550*200 which is not > correct. > > where i am going wrong???? > > looking forward to your replies. > > bye What this sounds like, is that when you are running one iteration of the loop you are not using the software pipelined loop because of insufficient number of iterations. This why the cycle counts for a single iteration seem high. You need a certain minimum number of iterations to get the loop primed and busy. In fact it can be seen that your steady state performance is 75 cycles per iteration as opposed to 550, which is a 7x improvement in performance. This is what software pipeling buys you, and in which case the saying "the more the meerier" is aptly true. Regards Jagadeesh Sankaran

______________________________
New Code Sharing Section now Live on DSPRelated.com. Learn about the Reward Program for Contributors here.



(You need to be a member of c6x -- send a blank email to c6x-subscribe@yahoogroups.com )

Hi ! I had a similar kind of a problem using the profiler... I found out that, when I single step for a single cycle assembly instruction, the profiler clock used to increment by 6 ! I think u could use the Statics manager of BIOS to get the right clock Cycles.... All the best, nikhil --- simha j <> wrote: > hi, > > i am using ccs2 for 621x. > I was Profiling a 'for loop' of my c-code which > loops > for count=200, few equations in it. > For this case I got clock=15050. > > but when i made count =1 (i.e., only one iteration), > I am getting clock = 550. > > so for count=200, clock becomes 550*200 which is > not > correct. > > where i am going wrong???? > > looking forward to your replies. > > bye > > _____________________________________ __________________________________________________

______________________________
Start your Android Ice Cream Sandwich development on TI's AM35x Sitara ARM Cortex-A8 processor today.



(You need to be a member of c6x -- send a blank email to c6x-subscribe@yahoogroups.com )