Technical discussions about the TI C6000 DSPs (including the c62x, c64x and c67x DSPs).
|
I often encounter 'word aligned' in reading manuals , but can't grasp the whole lot of ideas behind this concept.who can help me? |
|
|
|
Question: I often encounter 'word aligned' in reading manuals , but can't grasp the whole lot of ideas behind this concept.who can help me? Answer: The following comments pertain to C6x, so a byte is 8 bits, half-word is 16-bits, int is 32 bits, long is 40 bits, double is 64 bits. There are other machines out there that have idfferent assumptions. Every address is fundamentally byte aligned, as in can be loaded in using the load byte instruction. Take care though that on the C6000 unsigned bytes need to be loaded in as LDBU, and signed bytes using LDB. Therefore a byte address can end in 0x0, 0x1, 0x2, 0x3.. 0xF. An address is half-word aligned, if it ends either in 0x0, 0x2, ..0xE for eg 0x8000 and 0x800A are half word aligned addresses. Extending the argument addresses that end in 0x0, 0x4,0x8 and 0xC are word aligned, which would often arise for C62x and addresses that end in 0x0 or 0x8 are double word (64 bit aligned, as in aligned on 64 bit boundaries) which often arises for C64x. The C64x is unique in that it can perform non-aligned loads. That is you can load a double word value without worrying about the alignment of the address. This removes the burden of software devleopment, when the array is not necessarily aligned at the granularity you want ( cool eh!). Which load to use ? "Remember wider is better". Using wider loads cuts down the number of loads needed to access the given amount of data. One can specify that an array is word-aligned to the C6x compiler: _nassert((int)(address)%8 == 0); One can force the linker to do this by saying: #pragma DATA_ALIGN(address_of_array, 8); // double word #pragma DATA_ALIGN(address_of_array, 4); // word alignment Regards Jagadeesh Sankaran |