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Dear all,

I am programming a Linux device driver for the ATEME NVDK C64 board, which uses
a TI C6416 CPU. For transfering code I use DMA, which works fine except that the
driver does not get any Interrupts from board. So when DMA is finished, I can
only poll (which is not the purpose of a DMA) or sleep with a timeout, which
decreases transfer rate.

Requesting the Interrupt Number (request_irq()) and registering an ISR succeeds.
Then CPU registers are used as follows:

Initialize PCIIEN register for sending MASTEROK Interrupt.
iowrite32( (1<<6), ram + 0x40000c );

Check PCIIS register when Interrupt appears (which does not happen).
pciis = ioread32( ram + 0x400008 );
if( pciis & (1<<6) )
        //handle Interrupt

When DMA is finished, Bit 6 of PCIIS is set but the ISR is not called. I am not
sure whether the problem is Linux specific or board specific.

Am I doing something wrong or have I forgotten an important fact?

Thank you,
Tobias Neubert

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Tobias-

> My last posting is not displayed correctly, so I try it again.
> 
> I am programming a Linux device driver for the ATEME NVDK C64 board, which
> uses a TI C6416 CPU. For transfering code I use DMA, which works fine
except
> that the driver does not get any Interrupts from board. So when DMA is
> finished, I can only poll (which is not the purpose of a DMA) or sleep
with
> a timeout, which decreases transfer rate.
> 
> Requesting the Interrupt Number (request_irq()) and registering an ISR
> succeeds. Then CPU registers are used as follows:
> 
> Initialize PCIIEN register for sending MASTEROK Interrupt.
> iowrite32( (0x40), ram + 0x40000c );
> 
> Check PCIIS register when Interrupt appears (which does not happen).
> pciis = ioread32( ram + 0x400008 );
> if( pciis & (0x40) )
>         //handle Interrupt
> 
> When DMA is finished, Bit 6 of PCIIS is set but the ISR is not called. I
am
> not sure whether the problem is Linux specific or board specific.
> 
> Am I doing something wrong or have I forgotten an important fact?

This is a very "board specific" post -- if people don't have the ATEME
NVDK 64x board
they will be hard-pressed to give a specific answer.

One general 'divide & conquer' suggestion I would have:  check the /INTA
line on the
PCI bus with a digital scope, and use a GPIO output from the DSP to trigger the
scope
capture (i.e. set the GPIO line with DSP code when PCIIS goes high).  /INTA not
being
asserted would imply a board or firmware issue, and you would address it with
ATEME. 
If it is being asserted, then it implies an issue with your driver.

-Jeff

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Start your Android Ice Cream Sandwich development on TI's AM35x Sitara ARM Cortex-A8 processor today.



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