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Hi, I hope someone can help, earlier threads on this topic haven't quite answered my query. I am trying write a large arrays of real-time data from PC Host to TMS320C6701-EVM using PCI/FIFOs. The EVM Host Support Software is well documented and this works fine, but I can't find documentation about how to read the data on the target side. The EVM Software Support Tools (1.35) do not appear to be supported in CCS2.1, the Board Support Library (BSL) appears to be applicable to DSK not EVM and I can't find any relevent target-side examples in the TI documentation. A previous respondant to a similar query proposed using the HPI read/write and this works fine, however I believe that using PCI/FIFO would give me multiple channels (up to 4) of data throughput which is necessary for the data volumes I am contending with. I would appreciate any help, Kind regards David Schottlander Cranfield University, UK

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SPRU305, section 1.6.3 documments the addresses of the PCI addon registers on the DSP side. For details on the individual registers you can find the databook for the PCI chip on AMCCs web site. I belive there is a interrupt from the PCI chip connected to a IR pin on the 6201. Which one is in the spru305, if no where else, you can find it in the schematics. /Regards, Pär Ligander David Schottlander wrote: > Hi, > I hope someone can help, earlier threads on this topic haven't quite > answered my query. > > I am trying write a large arrays of real-time data from PC Host to > TMS320C6701-EVM using PCI/FIFOs. The EVM Host Support Software is well > documented and this works fine, but I can't find documentation about how to > read the data on the target side. The EVM Software Support Tools (1.35) do > not appear to be supported in CCS2.1, the Board Support Library (BSL) > appears to be applicable to DSK not EVM and I can't find any relevent > target-side examples in the TI documentation. > > A previous respondant to a similar query proposed using the HPI read/write > and this works fine, however I believe that using PCI/FIFO would give me > multiple channels (up to 4) of data throughput which is necessary for the > data volumes I am contending with. > > I would appreciate any help, > > Kind regards > > David Schottlander > Cranfield University, UK > > _____________________________________

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All, I'm writing some C6711 assembler code and on the CCS C671x simulator see the following error. "Can't Single Step Target Program: Too many accesses to L_WRITE_PORT_1 in cycle 818578" Does anyone know what this means and how to figure out what to change in my code ? I'm operating under the assumption that there are multiple writes to a single register being scheduled, but I can't figure out where. I wish the simulator would tell me - it must know which register is causing the error ! Comments ? Thanks, Andrew

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